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setup.py: Removing deps as per bug #1086#c7
[lambdasoc.git] / lambdasoc /
2022-04-22 Luke Kenneth Casso... add name to HyperRAM module so as to be able to pass... tree | commitdiff
2022-04-12 Luke Kenneth Casso... simulation pads naming corrections for HyperRAMPads tree | commitdiff
2022-03-28 Luke Kenneth Casso... work through the CSns to give the appearance of having... tree | commitdiff
2022-03-28 Luke Kenneth Casso... add cs_latch as a peer of bus_latch in case the address... tree | commitdiff
2022-03-28 Luke Kenneth Casso... minor simplification of hyperram: using constants tree | commitdiff
2022-03-28 Luke Kenneth Casso... extend cs in hyperram to multiple bits tree | commitdiff
2022-03-27 Luke Kenneth Casso... update code-comments tree | commitdiff
2022-03-27 Luke Kenneth Casso... add reset pad to hyperram, should be set externally tree | commitdiff
2022-03-26 Luke Kenneth Casso... hyperram CS inverted (corrected) tree | commitdiff
2022-03-26 Luke Kenneth Casso... sort out hyperram ports down to test class tree | commitdiff
2022-03-25 Luke Kenneth Casso... fix attributes, sort out address tree | commitdiff
2022-03-19 Luke Kenneth Casso... rename hyperram clk pads to "ck" tree | commitdiff
2022-03-18 Luke Kenneth Casso... cleanup tree | commitdiff
2022-03-18 Luke Kenneth Casso... add ports function to HyperRAMPHY tree | commitdiff
2022-03-18 Luke Kenneth Casso... rename TestHyperRAMPHY to just HyperRAMPHY tree | commitdiff
2022-03-18 Luke Kenneth Casso... move HyperRAMPads and Test PHY to hyperram.py module tree | commitdiff
2022-03-18 Luke Kenneth Casso... remove redundant implementation of migen "timeline" tree | commitdiff
2022-03-18 Luke Kenneth Casso... document useful "add_extension" for HyperRAM PMODs tree | commitdiff
2022-03-16 Luke Kenneth Casso... update HyperRAM module and add unit test tree | commitdiff
2022-03-15 Luke Kenneth Casso... add first version of hyperram.py tree | commitdiff
2021-10-29 Jean-François Nguyensim.blackboxes.serial: add missing Verilog blackbox. tree | commitdiff
2021-10-29 Jean-François Nguyencores.litedram: add device to generated YAML configuration. tree | commitdiff
2021-10-29 Jean-François Nguyentest: fix broken tests. tree | commitdiff
2021-10-29 Jean-François NguyenAdd LiteEth support. tree | commitdiff
2021-10-29 Jean-François Nguyensoc.cpu: generate BIOS configuration from SoC constants. tree | commitdiff
2021-10-29 Jean-François Nguyenperiph.serial: add PHY as parameter, in order to use... tree | commitdiff
2021-10-29 Jean-François Nguyenperiph: conform with nmigen-soc breaking changes. tree | commitdiff
2021-10-29 Jean-François Nguyencores.litedram: remove name_force parameter from Core... tree | commitdiff
2021-10-29 Jean-François Nguyencores.litedram: add SDR DRAM type. tree | commitdiff
2021-10-29 Jean-François NguyenAdd support for configuration constants. tree | commitdiff
2021-10-29 Jean-François Nguyencores.pll: add PLL generators for Lattice ECP5 and... tree | commitdiff
2021-10-29 Jean-François Nguyensim.blackboxes: add serial blackbox, with a serial_pty... tree | commitdiff
2021-10-29 Jean-François Nguyensim: add CXXRTL integration. tree | commitdiff
2021-07-01 Jean-François Nguyensoftware/bios: bump version. tree | commitdiff
2021-06-29 Jean-François Nguyencores.litedram: move memory map population to _populate... tree | commitdiff
2021-06-29 Jean-François Nguyencores.litedram: move name conflict detection to the... tree | commitdiff
2021-06-28 Jean-François NguyenAdd SDRAMPeripheral and SDRAMSoC example. tree | commitdiff
2021-06-28 Jean-François Nguyensoc.base: add support for adding user-provided template... tree | commitdiff
2021-06-28 Jean-François Nguyensoc.base: add socproperty(weak=True) for optional prope... tree | commitdiff
2021-06-28 Jean-François Nguyencores: add LiteDRAM core. tree | commitdiff
2021-06-28 Jean-François Nguyentools.flterm: warn and continue after failed TIOCMBIC... tree | commitdiff
2021-06-28 Jean-François Nguyenperiph.serial: update default rx_depth value to 256. tree | commitdiff
2021-06-28 Jean-François Nguyenperiph.serial: use buffered FIFOs to help BRAM inference. tree | commitdiff
2021-06-28 Jean-François Nguyentest.test_periph_serial: fix loopback test. tree | commitdiff
2021-06-28 Jean-François Nguyentest: _wishbone.py → utils/wishbone.py tree | commitdiff
2021-06-28 Jean-François Nguyentest: move to sim = Simulator(dut) instead of context... tree | commitdiff
2021-06-08 Jean-François Nguyensoftware/bios: bump version. tree | commitdiff
2021-06-01 Jean-François Nguyenperiph.base: use bridge granularity as CSR bus data... tree | commitdiff
2021-05-31 Jean-François Nguyenperiph.event: clear pending bits of level-triggered... tree | commitdiff
2021-05-31 Jean-François Nguyensoftware/bios: bump version. tree | commitdiff
2020-06-16 Jean-François NguyenMerge pull request #4 from jeanthom/fix-base-soc tree | commitdiff
2020-06-16 Jean-François NguyenMerge pull request #3 from jeanthom/master tree | commitdiff
2020-06-15 Jean THOMASFix ConfigBuilder instantiation in SoC base class tree | commitdiff
2020-06-08 Jean THOMASThrow exception if two CSR have the same name tree | commitdiff
2020-04-09 Jean-François Nguyensoc.cpu: log build output to stderr tree | commitdiff
2020-03-30 Jean-François Nguyentools: add flterm tree | commitdiff
2020-03-26 Jean-François Nguyensoc.cpu: add CPUSoC and BIOSBuilder tree | commitdiff
2020-03-26 Jean-François Nguyensoc.base: add SoC and ConfigBuilder tree | commitdiff
2020-03-26 Jean-François Nguyencpu: add MinervaCPU tree | commitdiff
2020-03-25 Jean-François Nguyenperiph.intc: add GenericInterruptController tree | commitdiff
2020-03-25 Jean-François Nguyenperiph.serial: add AsyncSerialPeripheral tree | commitdiff
2020-03-25 Jean-François Nguyenperiph._event → periph.event tree | commitdiff
2020-03-25 Jean-François Nguyenperiph.sram: add SRAMPeripheral tree | commitdiff
2020-03-25 Jean-François Nguyenperiph.timer: add TimerPeripheral tree | commitdiff
2020-03-25 Jean-François Nguyenperiph: add Peripheral base class tree | commitdiff