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update README
[libresoc-litex.git]
/
sim.py
2022-02-04
Luke Kenneth Casso...
get arty a7-100t functional
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2022-01-19
Luke Kenneth Casso...
alias Display to D - shorter
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2022-01-19
Luke Kenneth Casso...
add (commented-out) SVSRR0 DMI dump
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2022-01-18
Luke Kenneth Casso...
add getting of "fast" SPRs over DMI interface
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2021-12-23
Luke Kenneth Casso...
enabled debug printing of MSR
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2021-12-23
Luke Kenneth Casso...
only add pc_i in DMI mode
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2021-05-03
Luke Kenneth Casso...
must only try to connect jtag when variant requests it
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2021-05-03
Luke Kenneth Casso...
comment that variant for debug must be --variant=standard
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2021-04-22
Luke Kenneth Casso...
comments on DMI interface
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2021-04-20
Luke Kenneth Casso...
code-comments for sim.py debug mode
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2021-03-29
Luke Kenneth Casso...
move name of XICS ICS/ICP to match latest litex pythond...
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2021-03-12
Luke Kenneth Casso...
splitting out litex files from soc repo into separate...
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