[breaking-change] Fix polarity of "dm" signal in "memory" resource.
authorwhitequark <whitequark@whitequark.org>
Thu, 3 Oct 2019 06:10:43 +0000 (06:10 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 3 Oct 2019 06:16:18 +0000 (06:16 +0000)
LB# and UB# enable writing their corresponding byte. The "m" in "dm"
means mask; that is, logical high masks (prevents) the byte from
being written. This means that it should use Pins(), not PinsN(),
to get the behavior implied by "mask".

nmigen_boards/resources/memory.py

index 809035ce9a3eb9c653b85f287d988db8a95b8e41..33976a782e527a222e5b5e95db153bf6834820f0 100644 (file)
@@ -90,7 +90,7 @@ def SRAMResource(*args, cs, oe=None, we, a, d, dm=None, attrs=None):
     io.append(Subsignal("a", Pins(a, dir="o")))
     io.append(Subsignal("d", Pins(d, dir="io")))
     if dm is not None:
-        io.append(Subsignal("dm", PinsN(dm, dir="o"))) # dm="LB# UB#"
+        io.append(Subsignal("dm", Pins(dm, dir="o"))) # dm="LB# UB#"
     if attrs is not None:
         io.append(attrs)
     return Resource.family(*args, default_name="sram", ios=io)