add hwacha exception support
[riscv-isa-sim.git] / hwacha / decode_hwacha_ut.h
1 #ifndef _DECODE_HWACHA_UT_H
2 #define _DECODE_HWACHA_UT_H
3
4 #include "decode.h"
5 #include "decode_hwacha.h"
6 #include "hwacha.h"
7 #include "hwacha_xcpt.h"
8
9 #define UTIDX (i)
10
11 #undef RS1
12 #undef RS2
13 #undef WRITE_RD
14
15 static inline reg_t read_rs1(hwacha_t* h, insn_t insn, uint32_t idx)
16 {
17 if (INSN_RS1 >= h->get_ct_state()->nxpr)
18 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
19 return UT_RS1(idx);
20 }
21
22 static inline reg_t read_rs2(hwacha_t* h, insn_t insn, uint32_t idx)
23 {
24 if (INSN_RS2 >= h->get_ct_state()->nxpr)
25 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
26 return UT_RS2(idx);
27 }
28
29 static inline void write_rd(hwacha_t* h, insn_t insn, uint32_t idx, reg_t value)
30 {
31 if (INSN_RD >= h->get_ct_state()->nxpr)
32 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
33 UT_WRITE_RD(idx, value);
34 }
35
36 #define RS1 read_rs1(h, insn, UTIDX)
37 #define RS2 read_rs2(h, insn, UTIDX)
38 #define WRITE_RD(value) write_rd(h, insn, UTIDX, value)
39
40 #undef FRS1
41 #undef FRS2
42 #undef FRS3
43 #undef WRITE_FRD
44
45 static inline reg_t read_frs1(hwacha_t* h, insn_t insn, uint32_t idx)
46 {
47 if (INSN_RS1 >= h->get_ct_state()->nfpr)
48 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
49 return UT_FRS1(idx);
50 }
51
52 static inline reg_t read_frs2(hwacha_t* h, insn_t insn, uint32_t idx)
53 {
54 if (INSN_RS2 >= h->get_ct_state()->nfpr)
55 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
56 return UT_FRS2(idx);
57 }
58
59 static inline reg_t read_frs3(hwacha_t* h, insn_t insn, uint32_t idx)
60 {
61 if (INSN_RS3 >= h->get_ct_state()->nfpr)
62 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
63 return UT_FRS3(idx);
64 }
65
66 static inline void write_frd(hwacha_t* h, insn_t insn, uint32_t idx, reg_t value)
67 {
68 if (INSN_RD >= h->get_ct_state()->nfpr)
69 h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_REGID, VF_PC);
70 UT_WRITE_FRD(idx, value);
71 }
72
73 #define FRS1 read_frs1(h, insn, UTIDX)
74 #define FRS2 read_frs2(h, insn, UTIDX)
75 #define FRS3 read_frs3(h, insn, UTIDX)
76 #define WRITE_FRD(value) write_frd(h, insn, UTIDX, value)
77
78 // we assume the vector unit has floating-point alus
79 #undef require_fp
80 #define require_fp
81
82 // YUNSUP FIXME
83 #undef set_fp_exceptions
84 #define set_fp_exceptions
85
86 #endif