Commit log now prints while interrupts are enabled.
[riscv-isa-sim.git] / hwacha / hwacha.mk.in
1 hwacha_subproject_deps = \
2 riscv \
3 softfloat \
4
5 hwacha_install_prog_srcs = \
6
7 hwacha_hdrs = \
8 hwacha.h \
9 hwacha_xcpt.h \
10 decode_hwacha.h \
11 decode_hwacha_ut.h \
12 opcodes_hwacha.h \
13 opcodes_hwacha_ut.h \
14
15 hwacha_srcs = \
16 hwacha.cc \
17 hwacha_disasm.cc \
18 cvt16.cc \
19 $(hwacha_gen_srcs) \
20 $(hwacha_ut_gen_srcs) \
21
22 hwacha_test_srcs =
23
24 hwacha_gen_srcs = \
25 $(addsuffix .cc, $(call get_insn_list,$(src_dir)/hwacha/opcodes_hwacha.h))
26
27 $(hwacha_gen_srcs): %.cc: insns/%.h insn_template_hwacha.cc
28 sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/hwacha/insn_template_hwacha.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/hwacha/opcodes_hwacha.h,$(subst .cc,,$@))/' > $@
29
30 hwacha_ut_gen_srcs = \
31 $(addsuffix .cc, $(call get_insn_list,$(src_dir)/hwacha/opcodes_hwacha_ut.h))
32
33 $(hwacha_ut_gen_srcs): %.cc: insns_ut/%.h insn_template_hwacha_ut.cc
34 sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/hwacha/insn_template_hwacha_ut.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/hwacha/opcodes_hwacha_ut.h,$(subst .cc,,$@))/' > $@
35