identify instructions, plan: extract registers
[riscv-isa-sim.git] / id_regs.py
1 #!/usr/bin/env python
2 # Copyright (C) 2018 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
3
4 """ identify registers used in riscv/insns/*.h and create code
5 that can be used in spike at runtime
6
7 the design of spike assumes that once an opcode is identified,
8 the role of decoding the instruction is implicitly rolled into
9 and included inside the function that emulates that opcode.
10
11 however there may be circumstances where the behaviour of an
12 instruction has to change depending on "tags" associated with
13 the registers (security extensions, simple-v extension).
14 """
15
16 import os
17
18 def list_insns():
19 insns_dir = "./riscv/insns"
20 res = []
21 for fname in os.listdir(insns_dir):
22 if not fname.endswith(".h"):
23 continue
24 res.append(os.path.join(insns_dir, fname))
25 return res
26
27 if __name__ == '__main__':
28 files = list_insns()
29 for f in files:
30 print f