yuk. break id_regs.py being a generic tool by skipping csr ops
[riscv-isa-sim.git] / id_regs.py
1 #!/usr/bin/env python
2 # Copyright (C) 2018 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
3
4 """ identify registers used in riscv/insns/*.h and create code
5 that can be used in spike at runtime
6
7 the design of spike assumes that once an opcode is identified,
8 the role of decoding the instruction is implicitly rolled into
9 and included inside the function that emulates that opcode.
10
11 however there may be circumstances where the behaviour of an
12 instruction has to change depending on "tags" associated with
13 the registers (security extensions, simple-v extension).
14
15 therefore this code walks the instruction implementations
16 in riscv/insns/*.h looking for register usage patterns.
17 the resultant table can be used *prior* to the emulation,
18 without having to manually maintain such a table.
19 """
20
21 import os
22 import sys
23
24 insns_dir = "./riscv/insns"
25 def list_insns():
26 if len(sys.argv) == 2:
27 fullfname = sys.argv[1]
28 pth, fname = os.path.split(fullfname)
29 insn = fname[:-2]
30 return [(fullfname, insn)]
31
32 res = []
33 for fname in os.listdir(insns_dir):
34 if not fname.endswith(".h"):
35 continue
36 if fname.startswith("regs_"):
37 continue
38 insn = fname[:-2]
39 res.append((os.path.join(insns_dir, fname), insn))
40 return res
41
42 cintpatterns = [ 'WRITE_RVC_RS1S', 'WRITE_RVC_RS2S',
43 'RVC_RS1', 'RVC_RS2', 'RVC_RS1S', 'RVC_RS2S', ]
44 cfloatpatterns = [ 'WRITE_RVC_FRS2S', 'RVC_FRS2 ', 'RVC_FRS2S ']
45 intpatterns = ['WRITE_RD' , 'RS1', 'RS2', 'RS3']
46 floatpatterns = ['WRITE_FRD', 'FRS1', 'FRS2', 'FRS3']
47 patterns = intpatterns + floatpatterns
48 patterns += cintpatterns
49 patterns += cfloatpatterns
50
51 allfloats = floatpatterns + cfloatpatterns
52 floatmask = (1<<len(allfloats)-1)
53 allints = intpatterns + cintpatterns[2:]
54
55 skip = '#define USING_NOREGS\n' \
56 '#define REGS_PATTERN 0x0\n'
57 def find_registers(fname):
58 # HACK! macro-skipping csr* instructions too painful
59 if 'csr' in fname:
60 return skip
61 res = []
62 isintfloat = 0x0 + floatmask << len(allints)
63 with open(fname) as f:
64 f = f.read()
65 for pattern in patterns:
66 x = f.find(pattern)
67 if x == -1:
68 continue
69 if pattern.startswith('R') and x != 0 and f[x-1] == 'F':
70 # botch-job/hack: RS1 also matches against FRS1 (etc.)
71 # check letter before match: if "F", skip it.
72 continue
73 if pattern.startswith('R') and x != 0 and f[x-1] == '_':
74 # RS1 also matches against RVC_RS1 (etc.)
75 # check letter before match: if "_", skip it.
76 continue
77 if pattern.startswith('FR') and x != 0 and f[x-1] == '_':
78 # RS1 also matches against RVC_FRS1 (etc.)
79 # check letter before match: if "_", skip it.
80 continue
81 if 'RVC_' in pattern and f[x+len(pattern)] == 'S':
82 # RVC_RS2S also matches against RVC_RS2 (etc.)
83 # check letter at end of match: if "S", skip it.
84 continue
85 p = pattern
86 if p.startswith('WRITE_'):
87 p = p[6:]
88 if pattern in allints:
89 idx = allints.index(pattern)
90 isintfloat += 1 << idx
91 if pattern in allfloats:
92 idx = allfloats.index(pattern)
93 isintfloat &= ~(1 << (idx+len(allints)))
94 res.append('#define USING_REG_%s' % p)
95 if not res:
96 return skip
97 res.append('#define REGS_PATTERN 0x%x' % isintfloat)
98 return '\n'.join(res)
99
100 if __name__ == '__main__':
101 files = list_insns()
102 for (fname, insn) in files:
103 regsname = "regs_%s.h" % insn
104 regsname = os.path.join(insns_dir, regsname)
105 with open(regsname, "w") as f:
106 f.write(find_registers(fname))