added minerva and chips4makers jtag
[libreriscv.git] / mnolan.mdwn
1 # Michael Nolan
2
3 Bored college student and contributor to Libre-SOC
4
5 # Status Tracking
6
7 ## Currently working on
8
9 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
10 - with [[lkcl]]
11 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
12 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
13 - functions needed for simulator
14 - Shared 90% with [[lkcl]]
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
16 - Formal proof of decoder
17 - EUR 200
18
19 ## Completed not yet submitted
20
21 ## Submitted for RFP, waiting for payment
22
23 ### 2019-02-012 28-apr-2020
24
25 - <http://bugs.libre-riscv.org/show_bug.cgi?id=189> parent #48
26 - Add partitioned right shift to partitioned shifter
27 - EUR 150
28 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
29 - Partitioned equals and greater than comparison
30 - Shared 50% with [[lkcl]]
31 - EUR 200 (each)
32 - <http://bugs.libre-riscv.org/show_bug.cgi?id=172> parent #48
33 - Partitioned adc/sub/neg
34 - EUR 150
35 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
36 - partitioned scalar/vector shift
37 - Shared 50% with [[lkcl]]
38 - EUR 350 (each)
39
40 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
41
42 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
43 - auto-parser of POWER9
44 - Shared 50% with [[lkcl]]
45 - EUR 500 (each)
46
47 ### 2019-10P-032 28-apr-2020 NLNet 2019 Formal Correctness Proofs
48
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=162> parent #196
50 - Verify FSGNJ
51 - EUR 150
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=163> parent #196
53 - Verify FPMAX/MIN
54 - EUR 150
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=165> parent #196
56 - Verify FP comparison operators
57 - EUR 150
58
59
60
61 ## Paid
62
63 ### Project 2019-02-012 Date 27jan2020
64
65 - <http://bugs.libre-riscv.org/show_bug.cgi?id=120>
66
67 ### Project 2019-02-012 Date 09feb2020 - paid 28feb2020
68
69 - <http://bugs.libre-riscv.org/show_bug.cgi?id=129>
70 - Floating point eq, gt, ge
71 - EUR 150
72 - <http://bugs.libre-riscv.org/show_bug.cgi?id=130>
73 - Floating point min/max
74 - EUR 200