3 #include "debug_module.h"
4 #include "debug_defines.h"
9 #include "debug_rom/debug_rom.h"
10 #include "debug_rom_defines.h"
18 ///////////////////////// debug_module_t
20 debug_module_t::debug_module_t(sim_t
*sim
, unsigned progbufsize
, unsigned max_bus_master_bits
,
21 bool require_authentication
) :
22 progbufsize(progbufsize
),
23 program_buffer_bytes(4 + 4*progbufsize
),
24 max_bus_master_bits(max_bus_master_bits
),
25 require_authentication(require_authentication
),
26 debug_progbuf_start(debug_data_start
- program_buffer_bytes
),
27 debug_abstract_start(debug_progbuf_start
- debug_abstract_size
*4),
31 D(fprintf(stderr
, "debug_data_start=0x%x\n", debug_data_start
));
32 D(fprintf(stderr
, "debug_progbuf_start=0x%x\n", debug_progbuf_start
));
33 D(fprintf(stderr
, "debug_abstract_start=0x%x\n", debug_abstract_start
));
35 program_buffer
= new uint8_t[program_buffer_bytes
];
37 memset(halted
, 0, sizeof(halted
));
38 memset(debug_rom_flags
, 0, sizeof(debug_rom_flags
));
39 memset(resumeack
, 0, sizeof(resumeack
));
40 memset(havereset
, 0, sizeof(havereset
));
41 memset(program_buffer
, 0, program_buffer_bytes
);
42 program_buffer
[4*progbufsize
] = ebreak();
43 program_buffer
[4*progbufsize
+1] = ebreak() >> 8;
44 program_buffer
[4*progbufsize
+2] = ebreak() >> 16;
45 program_buffer
[4*progbufsize
+3] = ebreak() >> 24;
46 memset(dmdata
, 0, sizeof(dmdata
));
48 write32(debug_rom_whereto
, 0,
49 jal(ZERO
, debug_abstract_start
- DEBUG_ROM_WHERETO
));
51 memset(debug_abstract
, 0, sizeof(debug_abstract
));
56 debug_module_t::~debug_module_t()
58 delete[] program_buffer
;
61 void debug_module_t::reset()
63 for (unsigned i
= 0; i
< sim
->nprocs(); i
++) {
64 processor_t
*proc
= sim
->get_core(i
);
66 proc
->halt_request
= false;
72 dmstatus
.impebreak
= true;
73 dmstatus
.authenticated
= !require_authentication
;
77 abstractcs
.datacount
= sizeof(dmdata
) / 4;
78 abstractcs
.progbufsize
= progbufsize
;
83 if (max_bus_master_bits
> 0) {
85 sbcs
.asize
= sizeof(reg_t
) * 8;
87 if (max_bus_master_bits
>= 64)
89 if (max_bus_master_bits
>= 32)
91 if (max_bus_master_bits
>= 16)
93 if (max_bus_master_bits
>= 8)
99 void debug_module_t::add_device(bus_t
*bus
) {
100 bus
->add_device(DEBUG_START
, this);
103 bool debug_module_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
105 addr
= DEBUG_START
+ addr
;
107 if (addr
>= DEBUG_ROM_ENTRY
&&
108 (addr
+ len
) <= (DEBUG_ROM_ENTRY
+ debug_rom_raw_len
)) {
109 memcpy(bytes
, debug_rom_raw
+ addr
- DEBUG_ROM_ENTRY
, len
);
113 if (addr
>= DEBUG_ROM_WHERETO
&& (addr
+ len
) <= (DEBUG_ROM_WHERETO
+ 4)) {
114 memcpy(bytes
, debug_rom_whereto
+ addr
- DEBUG_ROM_WHERETO
, len
);
118 if (addr
>= DEBUG_ROM_FLAGS
&& ((addr
+ len
) <= DEBUG_ROM_FLAGS
+ 1024)) {
119 memcpy(bytes
, debug_rom_flags
+ addr
- DEBUG_ROM_FLAGS
, len
);
123 if (addr
>= debug_abstract_start
&& ((addr
+ len
) <= (debug_abstract_start
+ sizeof(debug_abstract
)))) {
124 memcpy(bytes
, debug_abstract
+ addr
- debug_abstract_start
, len
);
128 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
129 memcpy(bytes
, dmdata
+ addr
- debug_data_start
, len
);
133 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
134 memcpy(bytes
, program_buffer
+ addr
- debug_progbuf_start
, len
);
138 fprintf(stderr
, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
139 PRIx64
"\n", len
, addr
);
144 bool debug_module_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
149 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=0x%08x); "
150 "hartsel=0x%x\n", addr
, (unsigned) len
, *(uint32_t *) bytes
,
154 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=...); "
155 "hartsel=0x%x\n", addr
, (unsigned) len
, dmcontrol
.hartsel
);
163 memcpy(id_bytes
, bytes
, 4);
164 id
= read32(id_bytes
, 0);
167 addr
= DEBUG_START
+ addr
;
169 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
170 memcpy(dmdata
+ addr
- debug_data_start
, bytes
, len
);
174 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
175 memcpy(program_buffer
+ addr
- debug_progbuf_start
, bytes
, len
);
180 if (addr
== DEBUG_ROM_HALTED
) {
183 if (dmcontrol
.hartsel
== id
) {
184 if (0 == (debug_rom_flags
[id
] & (1 << DEBUG_ROM_FLAG_GO
))){
185 if (dmcontrol
.hartsel
== id
) {
186 abstractcs
.busy
= false;
193 if (addr
== DEBUG_ROM_GOING
) {
194 debug_rom_flags
[dmcontrol
.hartsel
] &= ~(1 << DEBUG_ROM_FLAG_GO
);
198 if (addr
== DEBUG_ROM_RESUMING
) {
201 resumeack
[id
] = true;
202 debug_rom_flags
[id
] &= ~(1 << DEBUG_ROM_FLAG_RESUME
);
206 if (addr
== DEBUG_ROM_EXCEPTION
) {
207 if (abstractcs
.cmderr
== CMDERR_NONE
) {
208 abstractcs
.cmderr
= CMDERR_EXCEPTION
;
213 fprintf(stderr
, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
214 PRIx64
"\n", len
, addr
);
218 void debug_module_t::write32(uint8_t *memory
, unsigned int index
, uint32_t value
)
220 uint8_t* base
= memory
+ index
* 4;
221 base
[0] = value
& 0xff;
222 base
[1] = (value
>> 8) & 0xff;
223 base
[2] = (value
>> 16) & 0xff;
224 base
[3] = (value
>> 24) & 0xff;
227 uint32_t debug_module_t::read32(uint8_t *memory
, unsigned int index
)
229 uint8_t* base
= memory
+ index
* 4;
230 uint32_t value
= ((uint32_t) base
[0]) |
231 (((uint32_t) base
[1]) << 8) |
232 (((uint32_t) base
[2]) << 16) |
233 (((uint32_t) base
[3]) << 24);
237 processor_t
*debug_module_t::current_proc() const
239 processor_t
*proc
= NULL
;
241 proc
= sim
->get_core(dmcontrol
.hartsel
);
242 } catch (const std::out_of_range
&) {
247 unsigned debug_module_t::sb_access_bits()
249 return 8 << sbcs
.sbaccess
;
252 void debug_module_t::sb_autoincrement()
254 if (!sbcs
.autoincrement
|| !max_bus_master_bits
)
257 uint64_t value
= sbaddress
[0] + sb_access_bits() / 8;
258 sbaddress
[0] = value
;
259 uint32_t carry
= value
>> 32;
261 value
= sbaddress
[1] + carry
;
262 sbaddress
[1] = value
;
265 value
= sbaddress
[2] + carry
;
266 sbaddress
[2] = value
;
269 sbaddress
[3] += carry
;
272 void debug_module_t::sb_read()
274 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
276 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
277 sbdata
[0] = sim
->debug_mmu
->load_uint8(address
);
278 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
279 sbdata
[0] = sim
->debug_mmu
->load_uint16(address
);
280 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
281 sbdata
[0] = sim
->debug_mmu
->load_uint32(address
);
282 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
283 uint64_t value
= sim
->debug_mmu
->load_uint32(address
);
285 sbdata
[1] = value
>> 32;
289 } catch (trap_load_access_fault
& t
) {
294 void debug_module_t::sb_write()
296 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
297 D(fprintf(stderr
, "sb_write() 0x%x @ 0x%lx\n", sbdata
[0], address
));
298 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
299 sim
->debug_mmu
->store_uint8(address
, sbdata
[0]);
300 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
301 sim
->debug_mmu
->store_uint16(address
, sbdata
[0]);
302 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
303 sim
->debug_mmu
->store_uint32(address
, sbdata
[0]);
304 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
305 sim
->debug_mmu
->store_uint64(address
,
306 (((uint64_t) sbdata
[1]) << 32) | sbdata
[0]);
312 bool debug_module_t::dmi_read(unsigned address
, uint32_t *value
)
315 D(fprintf(stderr
, "dmi_read(0x%x) -> ", address
));
316 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
317 unsigned i
= address
- DMI_DATA0
;
318 result
= read32(dmdata
, i
);
319 if (abstractcs
.busy
) {
321 fprintf(stderr
, "\ndmi_read(0x%02x (data[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
324 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
325 abstractcs
.cmderr
= CMDERR_BUSY
;
328 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
329 perform_abstract_command();
331 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
332 unsigned i
= address
- DMI_PROGBUF0
;
333 result
= read32(program_buffer
, i
);
334 if (abstractcs
.busy
) {
336 fprintf(stderr
, "\ndmi_read(0x%02x (progbuf[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
338 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
339 perform_abstract_command();
346 processor_t
*proc
= current_proc();
348 dmcontrol
.haltreq
= proc
->halt_request
;
350 result
= set_field(result
, DMI_DMCONTROL_HALTREQ
, dmcontrol
.haltreq
);
351 result
= set_field(result
, DMI_DMCONTROL_RESUMEREQ
, dmcontrol
.resumereq
);
352 result
= set_field(result
, DMI_DMCONTROL_HARTSELHI
,
353 dmcontrol
.hartsel
>> DMI_DMCONTROL_HARTSELLO_LENGTH
);
354 result
= set_field(result
, DMI_DMCONTROL_HARTSELLO
, dmcontrol
.hartsel
);
355 result
= set_field(result
, DMI_DMCONTROL_HARTRESET
, dmcontrol
.hartreset
);
356 result
= set_field(result
, DMI_DMCONTROL_NDMRESET
, dmcontrol
.ndmreset
);
357 result
= set_field(result
, DMI_DMCONTROL_DMACTIVE
, dmcontrol
.dmactive
);
362 processor_t
*proc
= current_proc();
364 dmstatus
.allnonexistant
= false;
365 dmstatus
.allunavail
= false;
366 dmstatus
.allrunning
= false;
367 dmstatus
.allhalted
= false;
368 dmstatus
.allresumeack
= false;
370 if (halted
[dmcontrol
.hartsel
]) {
371 dmstatus
.allhalted
= true;
373 dmstatus
.allrunning
= true;
376 dmstatus
.allnonexistant
= true;
378 dmstatus
.anynonexistant
= dmstatus
.allnonexistant
;
379 dmstatus
.anyunavail
= dmstatus
.allunavail
;
380 dmstatus
.anyrunning
= dmstatus
.allrunning
;
381 dmstatus
.anyhalted
= dmstatus
.allhalted
;
383 if (resumeack
[dmcontrol
.hartsel
]) {
384 dmstatus
.allresumeack
= true;
386 dmstatus
.allresumeack
= false;
389 dmstatus
.allresumeack
= false;
392 result
= set_field(result
, DMI_DMSTATUS_IMPEBREAK
,
394 result
= set_field(result
, DMI_DMSTATUS_ALLHAVERESET
,
395 havereset
[dmcontrol
.hartsel
]);
396 result
= set_field(result
, DMI_DMSTATUS_ANYHAVERESET
,
397 havereset
[dmcontrol
.hartsel
]);
398 result
= set_field(result
, DMI_DMSTATUS_ALLNONEXISTENT
, dmstatus
.allnonexistant
);
399 result
= set_field(result
, DMI_DMSTATUS_ALLUNAVAIL
, dmstatus
.allunavail
);
400 result
= set_field(result
, DMI_DMSTATUS_ALLRUNNING
, dmstatus
.allrunning
);
401 result
= set_field(result
, DMI_DMSTATUS_ALLHALTED
, dmstatus
.allhalted
);
402 result
= set_field(result
, DMI_DMSTATUS_ALLRESUMEACK
, dmstatus
.allresumeack
);
403 result
= set_field(result
, DMI_DMSTATUS_ANYNONEXISTENT
, dmstatus
.anynonexistant
);
404 result
= set_field(result
, DMI_DMSTATUS_ANYUNAVAIL
, dmstatus
.anyunavail
);
405 result
= set_field(result
, DMI_DMSTATUS_ANYRUNNING
, dmstatus
.anyrunning
);
406 result
= set_field(result
, DMI_DMSTATUS_ANYHALTED
, dmstatus
.anyhalted
);
407 result
= set_field(result
, DMI_DMSTATUS_ANYRESUMEACK
, dmstatus
.anyresumeack
);
408 result
= set_field(result
, DMI_DMSTATUS_AUTHENTICATED
, dmstatus
.authenticated
);
409 result
= set_field(result
, DMI_DMSTATUS_AUTHBUSY
, dmstatus
.authbusy
);
410 result
= set_field(result
, DMI_DMSTATUS_VERSION
, dmstatus
.version
);
414 result
= set_field(result
, DMI_ABSTRACTCS_CMDERR
, abstractcs
.cmderr
);
415 result
= set_field(result
, DMI_ABSTRACTCS_BUSY
, abstractcs
.busy
);
416 result
= set_field(result
, DMI_ABSTRACTCS_DATACOUNT
, abstractcs
.datacount
);
417 result
= set_field(result
, DMI_ABSTRACTCS_PROGBUFSIZE
,
418 abstractcs
.progbufsize
);
420 case DMI_ABSTRACTAUTO
:
421 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
, abstractauto
.autoexecprogbuf
);
422 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECDATA
, abstractauto
.autoexecdata
);
428 result
= set_field(result
, DMI_HARTINFO_NSCRATCH
, 1);
429 result
= set_field(result
, DMI_HARTINFO_DATAACCESS
, 1);
430 result
= set_field(result
, DMI_HARTINFO_DATASIZE
, abstractcs
.datacount
);
431 result
= set_field(result
, DMI_HARTINFO_DATAADDR
, debug_data_start
);
434 result
= set_field(result
, DMI_SBCS_SBVERSION
, sbcs
.version
);
435 result
= set_field(result
, DMI_SBCS_SBREADONADDR
, sbcs
.readonaddr
);
436 result
= set_field(result
, DMI_SBCS_SBACCESS
, sbcs
.sbaccess
);
437 result
= set_field(result
, DMI_SBCS_SBAUTOINCREMENT
, sbcs
.autoincrement
);
438 result
= set_field(result
, DMI_SBCS_SBREADONDATA
, sbcs
.readondata
);
439 result
= set_field(result
, DMI_SBCS_SBERROR
, sbcs
.error
);
440 result
= set_field(result
, DMI_SBCS_SBASIZE
, sbcs
.asize
);
441 result
= set_field(result
, DMI_SBCS_SBACCESS128
, sbcs
.access128
);
442 result
= set_field(result
, DMI_SBCS_SBACCESS64
, sbcs
.access64
);
443 result
= set_field(result
, DMI_SBCS_SBACCESS32
, sbcs
.access32
);
444 result
= set_field(result
, DMI_SBCS_SBACCESS16
, sbcs
.access16
);
445 result
= set_field(result
, DMI_SBCS_SBACCESS8
, sbcs
.access8
);
448 result
= sbaddress
[0];
451 result
= sbaddress
[1];
454 result
= sbaddress
[2];
457 result
= sbaddress
[3];
461 if (sbcs
.error
== 0) {
463 if (sbcs
.readondata
) {
482 D(fprintf(stderr
, "Unexpected. Returning Error."));
486 D(fprintf(stderr
, "0x%x\n", result
));
491 bool debug_module_t::perform_abstract_command()
493 if (abstractcs
.cmderr
!= CMDERR_NONE
)
495 if (abstractcs
.busy
) {
496 abstractcs
.cmderr
= CMDERR_BUSY
;
500 if ((command
>> 24) == 0) {
502 unsigned size
= get_field(command
, AC_ACCESS_REGISTER_SIZE
);
503 bool write
= get_field(command
, AC_ACCESS_REGISTER_WRITE
);
504 unsigned regno
= get_field(command
, AC_ACCESS_REGISTER_REGNO
);
506 if (!halted
[dmcontrol
.hartsel
]) {
507 abstractcs
.cmderr
= CMDERR_HALTRESUME
;
512 if (get_field(command
, AC_ACCESS_REGISTER_TRANSFER
)) {
514 if (regno
< 0x1000 && progbufsize
< 2) {
515 // Make the debugger use the program buffer if it's available, so it
516 // can test both use cases.
517 write32(debug_abstract
, i
++, csrw(S0
, CSR_DSCRATCH
));
522 write32(debug_abstract
, i
++, lw(S0
, ZERO
, debug_data_start
));
525 write32(debug_abstract
, i
++, ld(S0
, ZERO
, debug_data_start
));
528 abstractcs
.cmderr
= CMDERR_NOTSUP
;
531 write32(debug_abstract
, i
++, csrw(S0
, regno
));
534 write32(debug_abstract
, i
++, csrr(S0
, regno
));
537 write32(debug_abstract
, i
++, sw(S0
, ZERO
, debug_data_start
));
540 write32(debug_abstract
, i
++, sd(S0
, ZERO
, debug_data_start
));
543 abstractcs
.cmderr
= CMDERR_NOTSUP
;
547 write32(debug_abstract
, i
++, csrr(S0
, CSR_DSCRATCH
));
549 } else if (regno
>= 0x1000 && regno
< 0x1020) {
550 unsigned regnum
= regno
- 0x1000;
555 write32(debug_abstract
, i
++, lw(regnum
, ZERO
, debug_data_start
));
557 write32(debug_abstract
, i
++, sw(regnum
, ZERO
, debug_data_start
));
561 write32(debug_abstract
, i
++, ld(regnum
, ZERO
, debug_data_start
));
563 write32(debug_abstract
, i
++, sd(regnum
, ZERO
, debug_data_start
));
566 abstractcs
.cmderr
= CMDERR_NOTSUP
;
570 } else if (regno
>= 0x1020 && regno
< 0x1040) {
571 // Don't force the debugger to use progbuf if it exists, so the
572 // debugger has to make the decision not to use abstract commands to
573 // access 64-bit FPRs on 32-bit targets.
574 unsigned fprnum
= regno
- 0x1020;
579 write32(debug_abstract
, i
++, flw(fprnum
, ZERO
, debug_data_start
));
582 write32(debug_abstract
, i
++, fld(fprnum
, ZERO
, debug_data_start
));
585 abstractcs
.cmderr
= CMDERR_NOTSUP
;
592 write32(debug_abstract
, i
++, fsw(fprnum
, ZERO
, debug_data_start
));
595 write32(debug_abstract
, i
++, fsd(fprnum
, ZERO
, debug_data_start
));
598 abstractcs
.cmderr
= CMDERR_NOTSUP
;
603 } else if (regno
>= 0xc000 && (regno
& 1) == 1) {
604 // Support odd-numbered custom registers, to allow for debugger testing.
605 unsigned custom_number
= regno
- 0xc000;
606 abstractcs
.cmderr
= CMDERR_NONE
;
608 // Writing V to custom register N will cause future reads of N to
609 // return V, reads of N-1 will return V-1, etc.
610 custom_base
= read32(dmdata
, 0) - custom_number
;
612 write32(dmdata
, 0, custom_number
+ custom_base
);
613 write32(dmdata
, 1, 0);
618 abstractcs
.cmderr
= CMDERR_NOTSUP
;
623 if (get_field(command
, AC_ACCESS_REGISTER_POSTEXEC
)) {
624 write32(debug_abstract
, i
,
625 jal(ZERO
, debug_progbuf_start
- debug_abstract_start
- 4 * i
));
628 write32(debug_abstract
, i
++, ebreak());
631 debug_rom_flags
[dmcontrol
.hartsel
] |= 1 << DEBUG_ROM_FLAG_GO
;
633 abstractcs
.busy
= true;
635 abstractcs
.cmderr
= CMDERR_NOTSUP
;
640 bool debug_module_t::dmi_write(unsigned address
, uint32_t value
)
642 D(fprintf(stderr
, "dmi_write(0x%x, 0x%x)\n", address
, value
));
644 if (!dmstatus
.authenticated
&& address
!= DMI_AUTHDATA
&&
645 address
!= DMI_DMCONTROL
)
648 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
649 unsigned i
= address
- DMI_DATA0
;
650 if (!abstractcs
.busy
)
651 write32(dmdata
, address
- DMI_DATA0
, value
);
653 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
654 abstractcs
.cmderr
= CMDERR_BUSY
;
657 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
658 perform_abstract_command();
662 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
663 unsigned i
= address
- DMI_PROGBUF0
;
665 if (!abstractcs
.busy
)
666 write32(program_buffer
, i
, value
);
668 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
669 perform_abstract_command();
677 if (!dmcontrol
.dmactive
&& get_field(value
, DMI_DMCONTROL_DMACTIVE
))
679 dmcontrol
.dmactive
= get_field(value
, DMI_DMCONTROL_DMACTIVE
);
680 if (!dmstatus
.authenticated
)
682 if (dmcontrol
.dmactive
) {
683 dmcontrol
.haltreq
= get_field(value
, DMI_DMCONTROL_HALTREQ
);
684 dmcontrol
.resumereq
= get_field(value
, DMI_DMCONTROL_RESUMEREQ
);
685 dmcontrol
.hartreset
= get_field(value
, DMI_DMCONTROL_HARTRESET
);
686 dmcontrol
.ndmreset
= get_field(value
, DMI_DMCONTROL_NDMRESET
);
687 dmcontrol
.hartsel
= get_field(value
, DMI_DMCONTROL_HARTSELHI
) <<
688 DMI_DMCONTROL_HARTSELLO_LENGTH
;
689 dmcontrol
.hartsel
|= get_field(value
, DMI_DMCONTROL_HARTSELLO
);
690 dmcontrol
.hartsel
&= (1L<<hartsellen
) - 1;
691 if (get_field(value
, DMI_DMCONTROL_ACKHAVERESET
)) {
692 havereset
[dmcontrol
.hartsel
] = false;
695 processor_t
*proc
= current_proc();
697 proc
->halt_request
= dmcontrol
.haltreq
;
698 if (dmcontrol
.resumereq
) {
699 debug_rom_flags
[dmcontrol
.hartsel
] |= (1 << DEBUG_ROM_FLAG_RESUME
);
700 resumeack
[dmcontrol
.hartsel
] = false;
702 if (dmcontrol
.hartreset
) {
706 if (dmcontrol
.ndmreset
) {
707 for (size_t i
= 0; i
< sim
->nprocs(); i
++) {
708 proc
= sim
->get_core(i
);
717 return perform_abstract_command();
720 abstractcs
.cmderr
= (cmderr_t
) (((uint32_t) (abstractcs
.cmderr
)) & (~(uint32_t)(get_field(value
, DMI_ABSTRACTCS_CMDERR
))));
723 case DMI_ABSTRACTAUTO
:
724 abstractauto
.autoexecprogbuf
= get_field(value
,
725 DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
);
726 abstractauto
.autoexecdata
= get_field(value
,
727 DMI_ABSTRACTAUTO_AUTOEXECDATA
);
730 sbcs
.readonaddr
= get_field(value
, DMI_SBCS_SBREADONADDR
);
731 sbcs
.sbaccess
= get_field(value
, DMI_SBCS_SBACCESS
);
732 sbcs
.autoincrement
= get_field(value
, DMI_SBCS_SBAUTOINCREMENT
);
733 sbcs
.readondata
= get_field(value
, DMI_SBCS_SBREADONDATA
);
734 sbcs
.error
&= ~get_field(value
, DMI_SBCS_SBERROR
);
737 sbaddress
[0] = value
;
738 if (sbcs
.error
== 0 && sbcs
.readonaddr
) {
743 sbaddress
[1] = value
;
746 sbaddress
[2] = value
;
749 sbaddress
[3] = value
;
753 if (sbcs
.error
== 0) {
755 if (sbcs
.autoincrement
&& sbcs
.error
== 0) {
770 D(fprintf(stderr
, "debug authentication: got 0x%x; 0x%x unlocks\n", value
,
771 challenge
+ secret
));
772 if (require_authentication
) {
773 if (value
== challenge
+ secret
) {
774 dmstatus
.authenticated
= true;
776 dmstatus
.authenticated
= false;
777 challenge
= random();
786 void debug_module_t::proc_reset(unsigned id
)
788 havereset
[id
] = true;