Added commit logging (--enable-commitlog). Also fixed disasm bug.
[riscv-isa-sim.git] / riscv / dummy-rocc.h
1 #ifndef _RISCV_DUMMY_ROCC_H
2 #define _RISCV_DUMMY_ROCC_H
3
4 #include "rocc.h"
5 #include "mmu.h"
6
7 class dummy_rocc_t : public rocc_t
8 {
9 public:
10 const char* name() { return "dummy"; }
11
12 reg_t custom0(rocc_insn_t insn, reg_t xs1, reg_t xs2)
13 {
14 reg_t prev_acc = acc[insn.rs2];
15
16 if (insn.rs2 > num_acc)
17 illegal_instruction();
18
19 switch (insn.funct)
20 {
21 case 0: // acc <- xs1
22 acc[insn.rs2] = xs1;
23 break;
24 case 1: // xd <- acc (the only real work is the return statement below)
25 break;
26 case 2: // acc[rs2] <- Mem[xs1]
27 acc[insn.rs2] = p->get_mmu()->load_uint64(xs1);
28 break;
29 case 3: // acc[rs2] <- accX + xs1
30 acc[insn.rs2] += xs1;
31 break;
32 default:
33 illegal_instruction();
34 }
35
36 return prev_acc; // in all cases, xd <- previous value of acc[rs2]
37 }
38
39 private:
40 static const int num_acc = 4;
41 reg_t acc[num_acc];
42 };
43
44 REGISTER_EXTENSION(dummy, []() { return new dummy_rocc_t; })
45
46 #endif