Add support for virtual priv register. (#59)
[riscv-isa-sim.git] / riscv / gdbserver.h
1 #ifndef _RISCV_GDBSERVER_H
2 #define _RISCV_GDBSERVER_H
3
4 #include <map>
5 #include <queue>
6
7 #include <stdint.h>
8
9 class sim_t;
10
11 template <typename T>
12 class circular_buffer_t
13 {
14 public:
15 // The buffer can store capacity-1 data elements.
16 circular_buffer_t(unsigned int capacity) : data(new T[capacity]),
17 start(0), end(0), capacity(capacity) {}
18 circular_buffer_t() : start(0), end(0), capacity(0) {}
19 ~circular_buffer_t() { delete[] data; }
20
21 T *data;
22 unsigned int start; // Data start, inclusive.
23 unsigned int end; // Data end, exclusive.
24 unsigned int capacity; // Size of the buffer.
25 unsigned int size() const;
26 bool empty() const { return start == end; }
27 bool full() const { return ((end+1) % capacity) == start; }
28
29 // Return size and address of the block of RAM where more data can be copied
30 // to be added to the buffer.
31 unsigned int contiguous_empty_size() const;
32 T *contiguous_empty() { return data + end; }
33 void data_added(unsigned int bytes);
34
35 unsigned int contiguous_data_size() const;
36 T *contiguous_data() { return data + start; }
37 // Tell the buffer that some bytes were consumed from the start of the
38 // buffer.
39 void consume(unsigned int bytes);
40
41 void reset();
42
43 T operator[](unsigned int i) const { return data[(start + i) % capacity]; }
44
45 void append(const T *src, unsigned int count);
46 };
47
48 // Class to track software breakpoints that we set.
49 class software_breakpoint_t
50 {
51 public:
52 reg_t address;
53 unsigned int size;
54 unsigned char instruction[4];
55 };
56
57 class gdbserver_t;
58
59 class operation_t
60 {
61 public:
62 operation_t(gdbserver_t& gdbserver) : gs(gdbserver), current_step(0) {}
63 virtual ~operation_t() {}
64
65 bool step() {
66 bool result = perform_step(current_step);
67 current_step++;
68 return result;
69 }
70
71 // Perform the next step of this operation (which is probably to write to
72 // Debug RAM and assert the debug interrupt).
73 // Return true if this operation is complete. In that case the object will
74 // be deleted.
75 // Return false if more steps are required the next time the debug
76 // interrupt is clear.
77 virtual bool perform_step(unsigned int step) = 0;
78
79 protected:
80 gdbserver_t& gs;
81 unsigned int current_step;
82 };
83
84 /*
85 * word 32 64 128
86 * 0 inst/0 inst/0 inst/0
87 * 1 inst inst/0 inst/0
88 * 2 inst inst inst/0
89 * 3 inst inst inst/0
90 * 4 data0 data0 data0
91 * 5 data1 data0 data0
92 * 6 data2 data1 data0
93 * 7 data1 data0
94 * 8 data2 data1
95 * 9 data2 data1
96 * 10 data1
97 * 11 data1
98 * 12 data2
99 * 13 data2
100 * 14 data2
101 * 15 data2
102 */
103 enum slot {
104 SLOT_INST0,
105 SLOT_DATA0,
106 SLOT_DATA1,
107 SLOT_DATA_LAST,
108 };
109
110 static const unsigned int slot_offset32[] = {0, 4, 5, DEBUG_RAM_SIZE/4 - 1};
111 static const unsigned int slot_offset64[] = {0, 4, 6, DEBUG_RAM_SIZE/4 - 2};
112 static const unsigned int slot_offset128[] = {0, 4, 8, DEBUG_RAM_SIZE/4 - 4};
113
114 class gdbserver_t
115 {
116 public:
117 // Create a new server, listening for connections from localhost on the given
118 // port.
119 gdbserver_t(uint16_t port, sim_t *sim);
120
121 // Process all pending messages from a client.
122 void handle();
123
124 void handle_packet(const std::vector<uint8_t> &packet);
125 void handle_interrupt();
126
127 void handle_breakpoint(const std::vector<uint8_t> &packet);
128 void handle_continue(const std::vector<uint8_t> &packet);
129 void handle_extended(const std::vector<uint8_t> &packet);
130 void handle_general_registers_read(const std::vector<uint8_t> &packet);
131 void continue_general_registers_read();
132 void handle_halt_reason(const std::vector<uint8_t> &packet);
133 void handle_kill(const std::vector<uint8_t> &packet);
134 void handle_memory_binary_write(const std::vector<uint8_t> &packet);
135 void handle_memory_read(const std::vector<uint8_t> &packet);
136 void handle_query(const std::vector<uint8_t> &packet);
137 void handle_register_read(const std::vector<uint8_t> &packet);
138 void continue_register_read();
139 void handle_register_write(const std::vector<uint8_t> &packet);
140 void handle_step(const std::vector<uint8_t> &packet);
141
142 bool connected() const { return client_fd > 0; }
143
144 // TODO: Move this into its own packet sending class?
145 // Add the given message to send_buf.
146 void send(const char* msg);
147 // Hex-encode a 64-bit value, and send it to gcc in target byte order (little
148 // endian).
149 void send(uint64_t value);
150 // Hex-encode a 32-bit value, and send it to gcc in target byte order (little
151 // endian).
152 void send(uint32_t value);
153 // Hex-encode an 8-bit value, and send it to gcc.
154 void send(uint8_t value);
155 void send_packet(const char* data);
156 uint8_t running_checksum;
157 // Send "$" and clear running checksum.
158 void start_packet();
159 // Send "#" and checksum.
160 void end_packet(const char* data=NULL);
161
162 // Write value to the index'th word in Debug RAM.
163 void dr_write32(unsigned int index, uint32_t value);
164 void dr_write64(unsigned int index, uint64_t value);
165 void dr_write(enum slot slot, uint64_t value);
166 // Write jump-to-resume instruction to the index'th word in Debug RAM.
167 void dr_write_jump(unsigned int index);
168 // Write an xlen-bit store instruction.
169 void dr_write_store(unsigned int index, unsigned int reg, enum slot);
170 void dr_write_load(unsigned int index, unsigned int reg, enum slot);
171 uint32_t dr_read32(unsigned int index);
172 uint64_t dr_read64(unsigned int index);
173 uint64_t dr_read(enum slot slot);
174
175 // Return access size to use when writing length bytes to address, so that
176 // every write will be aligned.
177 unsigned int find_access_size(reg_t address, int length);
178
179 void set_interrupt(uint32_t hartid);
180
181 // Members that ought to be privated, but that we'd really like to access
182 // from operation classes.
183 reg_t dpc;
184 reg_t dcsr;
185 reg_t mstatus;
186 reg_t sptbr;
187 bool sptbr_valid;
188 bool fence_i_required;
189
190 std::map<reg_t, reg_t> pte_cache;
191
192 reg_t translate(reg_t vaddr);
193 // Return the PRV_x that is used when the code under debug performs a memory
194 // access.
195 unsigned int privilege_mode();
196 // Return the VM_x that is used when the code under debug performs a memory
197 // access.
198 unsigned int virtual_memory();
199
200 unsigned int xlen;
201
202 private:
203 sim_t *sim;
204 int socket_fd;
205 int client_fd;
206 circular_buffer_t<uint8_t> recv_buf;
207 circular_buffer_t<uint8_t> send_buf;
208
209 bool expect_ack;
210 bool extended_mode;
211 // Used to track whether we think the target is running. If we think it is
212 // but it isn't, we need to tell gdb about it.
213 bool running;
214
215 std::map <reg_t, software_breakpoint_t*> breakpoints;
216
217 // Read pending data from the client.
218 void read();
219 void write();
220 // Accept a new client if there isn't one already connected.
221 void accept();
222 // Process all complete requests in recv_buf.
223 void process_requests();
224
225 std::queue<operation_t*> operation_queue;
226 void add_operation(operation_t* operation);
227 };
228
229 #endif