projects / riscv-isa-sim.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
Update README
[riscv-isa-sim.git] / riscv / insns / flq.h
1 require_extension('Q');
2 require_fp;
3 WRITE_FRD(MMU.load_float128(RS1 + insn.i_imm()));
Simple-V augmented version of spike