Upgrade to latest SoftFloat

[riscv-isa-sim.git] / riscv / insns / fmsub_d.h

require_extension('D');
require_fp;
softfloat_roundingMode = RM;
WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(FRS3 ^ (uint64_t)INT64_MIN)).v);
set_fp_exceptions;