riscv/insns/mfpcr.h

   1 require_supervisor;
   2
   3 reg_t val;
   4
   5 switch(insn.rtype.rb)
   6 {
   7   case 0:
   8     val = sr;
   9     break;
  10   case 1:
  11     val = epc;
  12     break;
  13   case 2:
  14     val = badvaddr;
  15     break;
  16   case 3:
  17     val = ebase;
  18     break;
  19   case 4:
  20     val = count;
  21     break;
  22   case 5:
  23     val = compare;
  24     break;
  25
  26   case 8:
  27     val = MEMSIZE >> 12;
  28     break;
  29
  30   case 17:
  31     fromhost = val = sim->get_fromhost();
  32     break;
  33
  34   case 24:
  35     val = pcr_k0;
  36     break;
  37   case 25:
  38     val = pcr_k1;
  39     break;
  40
  41   default:
  42     val = -1;
  43 }
  44
  45 RC = gprlen == 64 ? val : sext32(val);