Instructions are no longer member functions
[riscv-isa-sim.git] / riscv / insns / sc_d.h
1 require_xpr64;
2 if (RS1 == p->get_state()->load_reservation)
3 {
4 MMU.store_uint64(RS1, RS2);
5 RD = 0;
6 }
7 else
8 RD = 1;