riscv/sv.cc

   1 #include "sv.h"
   2 #include "sv_decode.h"
   3
   4 sv_reg_csr_entry sv_csrs[SV_CSR_SZ];
   5 sv_reg_entry sv_int_tb[NXPR];
   6 sv_reg_entry sv_fp_tb[NFPR];
   7 sv_pred_csr_entry sv_pred_csrs[SV_CSR_SZ];
   8 sv_pred_entry sv_pred_tb[NXPR];
   9
  10 bool sv_check_reg(bool intreg, uint64_t reg)
  11 {
  12   sv_reg_entry *r;
  13   if (intreg)
  14   {
  15     r = &sv_int_tb[reg];
  16   }
  17   else
  18   {
  19     r = &sv_fp_tb[reg];
  20   }
  21   if (r->elwidth != 0)
  22   {
  23     // XXX raise exception
  24   }
  25   if (r->active && r->isvec)
  26   {
  27     return true;
  28   }
  29   return false;
  30 }
  31
  32 uint64_t sv_insn_t::remap(uint64_t reg)
  33 {
  34     return reg;
  35 }
  36