add reference to vector length in sv
[riscv-isa-sim.git] / riscv / sv_decode.h
1 // See LICENSE for license details.
2
3 #ifndef _RISCV_SV_DECODE_H
4 #define _RISCV_SV_DECODE_H
5
6 #include "sv.h"
7 #include "decode.h"
8
9 class sv_insn_t: public insn_t
10 {
11 public:
12 sv_insn_t(insn_bits_t bits, int& v) : insn_t(bits), vlen(v) {}
13 uint64_t rd () { return remap(insn_t::rd()); }
14 uint64_t rs1() { return remap(insn_t::rs1()); }
15 uint64_t rs2() { return remap(insn_t::rs2()); }
16 uint64_t rs3() { return remap(insn_t::rs3()); }
17 private:
18 int &vlen;
19 // remaps the register through the lookup table.
20 // will need to take the current loop index/offset somehow
21 uint64_t remap(uint64_t reg) { return reg; } // TODO
22 };
23
24 #endif