-#define DMI_SBDATA3_DATA (0xffffffff << DMI_SBDATA3_DATA_OFFSET)
-#define DMI_AUTHDATA 0x0b
-#define DMI_AUTHDATA_DATA_OFFSET 0
-#define DMI_AUTHDATA_DATA_LENGTH 32
-#define DMI_AUTHDATA_DATA (0xffffffff << DMI_AUTHDATA_DATA_OFFSET)
-#define DMI_ABSTRACTCS 0x0e
-#define DMI_ABSTRACTCS_AUTOEXEC7_OFFSET 15
-#define DMI_ABSTRACTCS_AUTOEXEC7_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC7 (0x1 << DMI_ABSTRACTCS_AUTOEXEC7_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC6_OFFSET 14
-#define DMI_ABSTRACTCS_AUTOEXEC6_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC6 (0x1 << DMI_ABSTRACTCS_AUTOEXEC6_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC5_OFFSET 13
-#define DMI_ABSTRACTCS_AUTOEXEC5_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC5 (0x1 << DMI_ABSTRACTCS_AUTOEXEC5_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC4_OFFSET 12
-#define DMI_ABSTRACTCS_AUTOEXEC4_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC4 (0x1 << DMI_ABSTRACTCS_AUTOEXEC4_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC3_OFFSET 11
-#define DMI_ABSTRACTCS_AUTOEXEC3_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC3 (0x1 << DMI_ABSTRACTCS_AUTOEXEC3_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC2_OFFSET 10
-#define DMI_ABSTRACTCS_AUTOEXEC2_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC2 (0x1 << DMI_ABSTRACTCS_AUTOEXEC2_OFFSET)
-#define DMI_ABSTRACTCS_AUTOEXEC1_OFFSET 9
-#define DMI_ABSTRACTCS_AUTOEXEC1_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC1 (0x1 << DMI_ABSTRACTCS_AUTOEXEC1_OFFSET)
-/*
-* When 1, accesses to \Rdatazero cause the command in \Rcommand to be
-* executed again.
-*
-* The same is true for other other autoexec bits: When 1, accesses to
-* {\tt data}N cause the command in \Rcommand to be executed again.
- */
-#define DMI_ABSTRACTCS_AUTOEXEC0_OFFSET 8
-#define DMI_ABSTRACTCS_AUTOEXEC0_LENGTH 1
-#define DMI_ABSTRACTCS_AUTOEXEC0 (0x1 << DMI_ABSTRACTCS_AUTOEXEC0_OFFSET)
-/*
-* Gets set if an abstract command fails. No abstract command is
-* started until the value is reset to 0.
-*
-* 0 (none): No error.
-*
-* 1 (busy): An abstract command was executing while \Rcommand or one
-* of the {\tt data} registers was accessed.
-*
-* 2 (not supported): The requested command is not supported. A
-* command that is not supported while the hart is running may be
-* supported when it is halted.
-*
-* 3 (exception): An exception occurred while executing the command
-* (eg. while executing the Program Buffer).
-*
-* 4 (halt/resume): An abstract command couldn't execute because the
-* hart wasn't in the expected state (running/halted).
-*
-* 7 (other): The command failed for another reason.
- */
-#define DMI_ABSTRACTCS_CMDERR_OFFSET 5
-#define DMI_ABSTRACTCS_CMDERR_LENGTH 3
-#define DMI_ABSTRACTCS_CMDERR (0x7 << DMI_ABSTRACTCS_CMDERR_OFFSET)
-/*
-* 1: An abstract command is currently being executed.
-*
-* This bit is set as soon as \Rcommand is written, and isn't cleared
-* until that command has completed.
- */
-#define DMI_ABSTRACTCS_BUSY_OFFSET 4
-#define DMI_ABSTRACTCS_BUSY_LENGTH 1
-#define DMI_ABSTRACTCS_BUSY (0x1 << DMI_ABSTRACTCS_BUSY_OFFSET)
-/*
-* Number of {\tt data} registers that are implemented as part of the
-* abstract command interface. If it's 0 then no abstract interface is
-* implemented at all.
- */
-#define DMI_ABSTRACTCS_DATACOUNT_OFFSET 0
-#define DMI_ABSTRACTCS_DATACOUNT_LENGTH 4
-#define DMI_ABSTRACTCS_DATACOUNT (0xf << DMI_ABSTRACTCS_DATACOUNT_OFFSET)
-#define DMI_COMMAND 0x0f
-/*
-* The type determines the overall functionality of this
-* abstract command.
- */
-#define DMI_COMMAND_TYPE_OFFSET 24
-#define DMI_COMMAND_TYPE_LENGTH 8
-#define DMI_COMMAND_TYPE (0xff << DMI_COMMAND_TYPE_OFFSET)
-/*
-* This field is interpreted in a command-specific manner,
-* described for each abstract command.
- */
-#define DMI_COMMAND_CONTROL_OFFSET 0
-#define DMI_COMMAND_CONTROL_LENGTH 24
-#define DMI_COMMAND_CONTROL (0xffffff << DMI_COMMAND_CONTROL_OFFSET)
-#define DMI_DATA0 0x10
-#define DMI_DATA0_DATA_OFFSET 0
-#define DMI_DATA0_DATA_LENGTH 32
-#define DMI_DATA0_DATA (0xffffffff << DMI_DATA0_DATA_OFFSET)
-#define DMI_DATA1 0x11
-#define DMI_DATA2 0x12
-#define DMI_DATA3 0x13
-#define DMI_DATA4 0x14
-#define DMI_DATA5 0x15
-#define DMI_DATA6 0x16
-#define DMI_DATA7 0x17
-#define DMI_DATA8 0x18
-#define DMI_DATA9 0x19
-#define DMI_DATA10 0x1a
-#define DMI_DATA11 0x1b
-#define DMI_SERDATA 0x1c
-#define DMI_SERDATA_DATA_OFFSET 0
-#define DMI_SERDATA_DATA_LENGTH 32
-#define DMI_SERDATA_DATA (0xffffffff << DMI_SERDATA_DATA_OFFSET)
-#define DMI_SERCS 0x1d
-/*
-* Number of supported serial ports.
- */
-#define DMI_SERCS_SERIALCOUNT_OFFSET 28
-#define DMI_SERCS_SERIALCOUNT_LENGTH 4
-#define DMI_SERCS_SERIALCOUNT (0xf << DMI_SERCS_SERIALCOUNT_OFFSET)
-/*
-* Select which serial port is accessed by \Rserdata.
- */
-#define DMI_SERCS_SERIAL_OFFSET 16
-#define DMI_SERCS_SERIAL_LENGTH 3
-#define DMI_SERCS_SERIAL (0x7 << DMI_SERCS_SERIAL_OFFSET)
-#define DMI_SERCS_VALID7_OFFSET 15
-#define DMI_SERCS_VALID7_LENGTH 1
-#define DMI_SERCS_VALID7 (0x1 << DMI_SERCS_VALID7_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW7_OFFSET 14
-#define DMI_SERCS_FULL_OVERFLOW7_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW7 (0x1 << DMI_SERCS_FULL_OVERFLOW7_OFFSET)
-#define DMI_SERCS_VALID6_OFFSET 13
-#define DMI_SERCS_VALID6_LENGTH 1
-#define DMI_SERCS_VALID6 (0x1 << DMI_SERCS_VALID6_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW6_OFFSET 12
-#define DMI_SERCS_FULL_OVERFLOW6_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW6 (0x1 << DMI_SERCS_FULL_OVERFLOW6_OFFSET)
-#define DMI_SERCS_VALID5_OFFSET 11
-#define DMI_SERCS_VALID5_LENGTH 1
-#define DMI_SERCS_VALID5 (0x1 << DMI_SERCS_VALID5_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW5_OFFSET 10
-#define DMI_SERCS_FULL_OVERFLOW5_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW5 (0x1 << DMI_SERCS_FULL_OVERFLOW5_OFFSET)
-#define DMI_SERCS_VALID4_OFFSET 9
-#define DMI_SERCS_VALID4_LENGTH 1
-#define DMI_SERCS_VALID4 (0x1 << DMI_SERCS_VALID4_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW4_OFFSET 8
-#define DMI_SERCS_FULL_OVERFLOW4_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW4 (0x1 << DMI_SERCS_FULL_OVERFLOW4_OFFSET)
-#define DMI_SERCS_VALID3_OFFSET 7
-#define DMI_SERCS_VALID3_LENGTH 1
-#define DMI_SERCS_VALID3 (0x1 << DMI_SERCS_VALID3_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW3_OFFSET 6
-#define DMI_SERCS_FULL_OVERFLOW3_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW3 (0x1 << DMI_SERCS_FULL_OVERFLOW3_OFFSET)
-#define DMI_SERCS_VALID2_OFFSET 5
-#define DMI_SERCS_VALID2_LENGTH 1
-#define DMI_SERCS_VALID2 (0x1 << DMI_SERCS_VALID2_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW2_OFFSET 4
-#define DMI_SERCS_FULL_OVERFLOW2_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW2 (0x1 << DMI_SERCS_FULL_OVERFLOW2_OFFSET)
-#define DMI_SERCS_VALID1_OFFSET 3
-#define DMI_SERCS_VALID1_LENGTH 1
-#define DMI_SERCS_VALID1 (0x1 << DMI_SERCS_VALID1_OFFSET)
-#define DMI_SERCS_FULL_OVERFLOW1_OFFSET 2
-#define DMI_SERCS_FULL_OVERFLOW1_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW1 (0x1 << DMI_SERCS_FULL_OVERFLOW1_OFFSET)
-/*
-* 1 when the core-to-debugger queue for serial port 0 is not empty.
- */
-#define DMI_SERCS_VALID0_OFFSET 1
-#define DMI_SERCS_VALID0_LENGTH 1
-#define DMI_SERCS_VALID0 (0x1 << DMI_SERCS_VALID0_OFFSET)
-/*
-* 1 when the debugger-to-core queue for serial port 0 is either full,
-* or has overflowed. Overflow state is sticky, and can be reset by
-* writing 0 to this bit.
- */
-#define DMI_SERCS_FULL_OVERFLOW0_OFFSET 0
-#define DMI_SERCS_FULL_OVERFLOW0_LENGTH 1
-#define DMI_SERCS_FULL_OVERFLOW0 (0x1 << DMI_SERCS_FULL_OVERFLOW0_OFFSET)
-#define DMI_PROGBUFCS 0x1f
-/*
-* Size of the Program Buffer, in 32-bit words. Valid sizes are 0 - 12.
-*
-* A debugger must not access any Program Buffer locations that
-* fall outside the range specified here.
-*
-* TODO: Explain what can be done with each size of the buffer, to suggest
-* why you would want more or less words.
- */
-#define DMI_PROGBUFCS_PROGSIZE_OFFSET 0
-#define DMI_PROGBUFCS_PROGSIZE_LENGTH 4
-#define DMI_PROGBUFCS_PROGSIZE (0xf << DMI_PROGBUFCS_PROGSIZE_OFFSET)
-#define DMI_PROGBUF0 0x20
-#define DMI_PROGBUF0_DATA_OFFSET 0
-#define DMI_PROGBUF0_DATA_LENGTH 32
-#define DMI_PROGBUF0_DATA (0xffffffff << DMI_PROGBUF0_DATA_OFFSET)
-#define DMI_PROGBUF1 0x21
-#define DMI_PROGBUF2 0x22
-#define DMI_PROGBUF3 0x23
-#define DMI_PROGBUF4 0x24
-#define DMI_PROGBUF5 0x25
-#define DMI_PROGBUF6 0x26
-#define DMI_PROGBUF7 0x27
-#define DMI_PROGBUF8 0x28
-#define DMI_PROGBUF9 0x29
-#define DMI_PROGBUF10 0x2a
-#define DMI_PROGBUF11 0x2b
-#define SERINFO 0x110
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL7_OFFSET 7
-#define SERINFO_SERIAL7_LENGTH 1
-#define SERINFO_SERIAL7 (0x1 << SERINFO_SERIAL7_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL6_OFFSET 6
-#define SERINFO_SERIAL6_LENGTH 1
-#define SERINFO_SERIAL6 (0x1 << SERINFO_SERIAL6_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL5_OFFSET 5
-#define SERINFO_SERIAL5_LENGTH 1
-#define SERINFO_SERIAL5 (0x1 << SERINFO_SERIAL5_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL4_OFFSET 4
-#define SERINFO_SERIAL4_LENGTH 1
-#define SERINFO_SERIAL4 (0x1 << SERINFO_SERIAL4_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL3_OFFSET 3
-#define SERINFO_SERIAL3_LENGTH 1
-#define SERINFO_SERIAL3 (0x1 << SERINFO_SERIAL3_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL2_OFFSET 2
-#define SERINFO_SERIAL2_LENGTH 1
-#define SERINFO_SERIAL2 (0x1 << SERINFO_SERIAL2_OFFSET)
-/*
-* Like \Fserialzero.
- */
-#define SERINFO_SERIAL1_OFFSET 1
-#define SERINFO_SERIAL1_LENGTH 1
-#define SERINFO_SERIAL1 (0x1 << SERINFO_SERIAL1_OFFSET)
-/*
-* 1 means serial interface 0 is supported.
- */
-#define SERINFO_SERIAL0_OFFSET 0
-#define SERINFO_SERIAL0_LENGTH 1
-#define SERINFO_SERIAL0 (0x1 << SERINFO_SERIAL0_OFFSET)
-#define SERSEND0 0x200
-#define SERRECV0 0x204
-#define SERSTAT0 0x208
-/*
-* Send ready. 1 when the core-to-debugger queue is not full. 0
-* otherwise.
- */
-#define SERSTAT0_SENDR_OFFSET 1
-#define SERSTAT0_SENDR_LENGTH 1
-#define SERSTAT0_SENDR (0x1 << SERSTAT0_SENDR_OFFSET)
-/*
-* Receive ready. 1 when the debugger-to-core queue is not empty. 0
-* otherwise.
- */
-#define SERSTAT0_RECVR_OFFSET 0
-#define SERSTAT0_RECVR_LENGTH 1
-#define SERSTAT0_RECVR (0x1 << SERSTAT0_RECVR_OFFSET)
-#define SERSEND1 0x20c
-#define SERRECV1 0x210
-#define SERSTAT1 0x214
-#define SERSEND2 0x218
-#define SERRECV2 0x21c
-#define SERSTAT2 0x220
-#define SERSEND3 0x224
-#define SERRECV3 0x228
-#define SERSTAT3 0x22c
-#define SERSEND4 0x230
-#define SERRECV4 0x234
-#define SERSTAT4 0x238
-#define SERSEND5 0x23c
-#define SERRECV5 0x240
-#define SERSTAT5 0x244
-#define SERSEND6 0x248
-#define SERRECV6 0x24c
-#define SERSTAT6 0x250
-#define SERSEND7 0x254
-#define SERRECV7 0x258
-#define SERSTAT7 0x25c
-#define TRACE 0x728
-/*
-* 1 if the trace buffer has wrapped since the last time \Fdiscard was
-* written. 0 otherwise.
- */
-#define TRACE_WRAPPED_OFFSET 24
-#define TRACE_WRAPPED_LENGTH 1
-#define TRACE_WRAPPED (0x1 << TRACE_WRAPPED_OFFSET)
-/*
-* Emit Timestamp trace sequences.
- */
-#define TRACE_EMITTIMESTAMP_OFFSET 23
-#define TRACE_EMITTIMESTAMP_LENGTH 1
-#define TRACE_EMITTIMESTAMP (0x1 << TRACE_EMITTIMESTAMP_OFFSET)
-/*
-* Emit Store Data trace sequences.
- */
-#define TRACE_EMITSTOREDATA_OFFSET 22
-#define TRACE_EMITSTOREDATA_LENGTH 1
-#define TRACE_EMITSTOREDATA (0x1 << TRACE_EMITSTOREDATA_OFFSET)
-/*
-* Emit Load Data trace sequences.
- */
-#define TRACE_EMITLOADDATA_OFFSET 21
-#define TRACE_EMITLOADDATA_LENGTH 1
-#define TRACE_EMITLOADDATA (0x1 << TRACE_EMITLOADDATA_OFFSET)
-/*
-* Emit Store Address trace sequences.
- */
-#define TRACE_EMITSTOREADDR_OFFSET 20
-#define TRACE_EMITSTOREADDR_LENGTH 1
-#define TRACE_EMITSTOREADDR (0x1 << TRACE_EMITSTOREADDR_OFFSET)
-/*
-* Emit Load Address trace sequences.
- */
-#define TRACE_EMITLOADADDR_OFFSET 19
-#define TRACE_EMITLOADADDR_LENGTH 1
-#define TRACE_EMITLOADADDR (0x1 << TRACE_EMITLOADADDR_OFFSET)
-/*
-* Emit Privilege Level trace sequences.
- */
-#define TRACE_EMITPRIV_OFFSET 18
-#define TRACE_EMITPRIV_LENGTH 1
-#define TRACE_EMITPRIV (0x1 << TRACE_EMITPRIV_OFFSET)
-/*
-* Emit Branch Taken and Branch Not Taken trace sequences.
- */
-#define TRACE_EMITBRANCH_OFFSET 17
-#define TRACE_EMITBRANCH_LENGTH 1
-#define TRACE_EMITBRANCH (0x1 << TRACE_EMITBRANCH_OFFSET)
-/*
-* Emit PC trace sequences.
- */
-#define TRACE_EMITPC_OFFSET 16
-#define TRACE_EMITPC_LENGTH 1
-#define TRACE_EMITPC (0x1 << TRACE_EMITPC_OFFSET)
-/*
-* Determine what happens when the trace buffer is full. 0 means wrap
-* and overwrite. 1 means turn off trace until \Fdiscard is written as 1.
-* 2 means cause a trace full exception. 3 is reserved for future use.
- */
-#define TRACE_FULLACTION_OFFSET 8
-#define TRACE_FULLACTION_LENGTH 2
-#define TRACE_FULLACTION (0x3 << TRACE_FULLACTION_OFFSET)
-/*
-* 0: Trace to a dedicated on-core RAM (which is not further defined in
-* this spec).
-*
-* 1: Trace to RAM on the system bus.
-*
-* 2: Send trace data to a dedicated off-chip interface (which is not
-* defined in this spec). This does not affect execution speed.
-*
-* 3: Reserved for future use.
-*
-* Options 0 and 1 slow down execution (eg. because of system bus
-* contention).
- */
-#define TRACE_DESTINATION_OFFSET 4
-#define TRACE_DESTINATION_LENGTH 2
-#define TRACE_DESTINATION (0x3 << TRACE_DESTINATION_OFFSET)
-/*
-* When 1, the trace logic may stall processor execution to ensure it
-* can emit all the trace sequences required. When 0 individual trace
-* sequences may be dropped.
- */
-#define TRACE_STALL_OFFSET 2
-#define TRACE_STALL_LENGTH 1
-#define TRACE_STALL (0x1 << TRACE_STALL_OFFSET)
-/*
-* Writing 1 to this bit tells the trace logic that any trace
-* collected is no longer required. When tracing to RAM, it resets the
-* trace write pointer to the start of the memory, as well as
-* \Fwrapped.
- */
-#define TRACE_DISCARD_OFFSET 1
-#define TRACE_DISCARD_LENGTH 1
-#define TRACE_DISCARD (0x1 << TRACE_DISCARD_OFFSET)
-#define TRACE_SUPPORTED_OFFSET 0
-#define TRACE_SUPPORTED_LENGTH 1
-#define TRACE_SUPPORTED (0x1 << TRACE_SUPPORTED_OFFSET)
-#define TBUFSTART 0x729
-#define TBUFEND 0x72a
-#define TBUFWRITE 0x72b