- //
- // If there is support for compressed instructions, the mmu and the
- // switch statement get more complicated. Each branch target is stored
- // in the index corresponding to mmu->icache_index(), but consecutive
- // non-branching instructions are stored in consecutive indices even if
- // mmu->icache_index() specifies a different index (which is the case
- // for 32-bit instructions in the presence of compressed instructions).