decode.h \
devices.h \
disasm.h \
decode.h \
devices.h \
disasm.h \
mmu.h \
processor.h \
sim.h \
mmu.h \
processor.h \
sim.h \
trap.h \
encoding.h \
cachesim.h \
trap.h \
encoding.h \
cachesim.h \
insn_template.h \
mulhi.h \
debug_module.h \
insn_template.h \
mulhi.h \
debug_module.h \
remote_bitbang.h \
jtag_dtm.h \
remote_bitbang.h \
jtag_dtm.h \
riscv_srcs = \
processor.cc \
execute.cc \
riscv_srcs = \
processor.cc \
execute.cc \
sim.cc \
interactive.cc \
trap.cc \
sim.cc \
interactive.cc \
trap.cc \
ebreak \
ecall \
fadd_d \
ebreak \
ecall \
fadd_d \
fclass_s \
fcvt_d_l \
fcvt_d_lu \
fclass_s \
fcvt_d_l \
fcvt_d_lu \
fcvt_d_s \
fcvt_d_w \
fcvt_d_wu \
fcvt_l_d \
fcvt_d_s \
fcvt_d_w \
fcvt_d_wu \
fcvt_l_d \
+ fcvt_q_d \
+ fcvt_q_l \
+ fcvt_q_lu \
+ fcvt_q_s \
+ fcvt_q_w \
+ fcvt_q_wu \
fcvt_s_d \
fcvt_s_l \
fcvt_s_lu \
fcvt_s_d \
fcvt_s_l \
fcvt_s_lu \
fcvt_s_w \
fcvt_s_wu \
fcvt_w_d \
fcvt_s_w \
fcvt_s_wu \
fcvt_w_d \
fdiv_s \
fence \
fence_i \
feq_d \
fdiv_s \
fence \
fence_i \
feq_d \
fmul_s \
fmv_d_x \
fmv_w_x \
fmv_x_d \
fmv_x_w \
fnmadd_d \
fmul_s \
fmv_d_x \
fmv_w_x \
fmv_x_d \
fmv_x_w \
fnmadd_d \
fnmsub_s \
fsd \
fsgnj_d \
fnmsub_s \
fsd \
fsgnj_d \
fsgnjn_s \
fsgnj_s \
fsgnjx_d \
fsgnjn_s \
fsgnj_s \
fsgnjx_d \