- // global architected state
- reg_t tohost;
- reg_t fromhost;
-
- appserver_link_t* applink;
-
- size_t memsz;
- char* mem;
- std::vector<processor_t> procs;
-
- void step_all(size_t n, size_t interleave, bool noisy);
-
+ std::vector<std::pair<reg_t, mem_t*>> mems;
+ mmu_t* debug_mmu; // debug port into main memory
+ std::vector<processor_t*> procs;
+ reg_t start_pc;
+ std::string dts;
+ std::unique_ptr<rom_device_t> boot_rom;
+ std::unique_ptr<clint_t> clint;
+ bus_t bus;
+
+ processor_t* get_core(const std::string& i);
+ void step(size_t n); // step through simulation
+ static const size_t INTERLEAVE = 5000;
+ static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core
+ static const size_t CPU_HZ = 1000000000; // 1GHz CPU
+ size_t current_step;
+ size_t current_proc;
+ bool debug;
+ bool log;
+ bool histogram_enabled; // provide a histogram of PCs
+ remote_bitbang_t* remote_bitbang;
+
+ // memory-mapped I/O routines
+ char* addr_to_mem(reg_t addr);
+ bool mmio_load(reg_t addr, size_t len, uint8_t* bytes);
+ bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes);
+ void make_dtb();
+
+ // presents a prompt for introspection into the simulation
+ void interactive();
+
+ // functions that help implement interactive()
+ void interactive_help(const std::string& cmd, const std::vector<std::string>& args);