- # Synthesize STALL signal for master port
- if hasattr(self.master_bus, "stall"):
- comb += self.master_bus.stall.eq(self.master_bus.cyc & ~self.master_bus.ack)
-
- # Convert incoming slave STALL signal to a format that the async bridge understands...
- if hasattr(self.slave_bus, "stall"):
- comb += slave_ack.eq(self.slave_bus.ack & ~self.slave_bus.stall)
- else:
- comb += slave_ack.eq(self.slave_bus.ack)
-