add Makefile for verilog compilation

[rv32.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index 20598f54c4cb3063b0db5c7ebe8bdae7c4eeacb2..055d8332e8eedc390cbc9c795c970e252f3820e9 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -75,3 +75,7 @@
 /xlnx_auto_0_xdb
 /xst
 /output.bit
+/dump.vcd
+/rv32
+.*.sw?
+*.vgen