add links, add bitmanip logic ops

[libreriscv.git] / 3d_gpu.mdwn

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 1ed52f430657b8672ee7db4ae03f3286083b0666..a08f9967b44bb942d21376063f00db92bdf15032 100644 (file)
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -7,17 +7,20 @@ Our primary goal is to design a **complete** all-in-one processor
 (System-on-a-Chip) that happens to include a libre-licensed VPU and GPU.
 
 We seek investors, sponsors, engineers and potential customers, who are
-interested in the creation and use of an entirely libre low-power mobile
-class system-on-a-chip.  Comparative benchmark performance, pincount and
-price is the Allwinner A64, except that the power budget target is 2.5 watts
-in a 16x16mm 320 to 360 pin 0.8mm FBGA package.
+interested, as a first product, in the creation and use of an entirely
+libre low-power mobile class system-on-a-chip.  Comparative benchmark
+performance, pincount and price is the Allwinner A64, except that the
+power budget target is 2.5 watts in a 16x16mm 320 to 360 pin 0.8mm
+FBGA package.  Instead of single-issue higher clock rate, the design is
+multi-issue, aiming for around 800mhz.
 
 The lower pincount, lower power, and higher BGA pitch is all to reduce
 the cost of product development when it comes to PCB design and layout:
 
-* Above 4 watts requires metal packages, thermal management and much
-  pricier PMICs.
-* 0.6mm pitch BGA and below requires much more expensive PCBA techniques.
+* Above 4 watts requires metal packages, greater attention to thermal
+  management in the PCB design and layout, and much pricier PMICs.
+* 0.6mm pitch BGA and below requires much more expensive PCB manufacturing
+  equipment and more costly PCBA techniques.
 * Above 600 pins begins to reduce production yields as well as increase
   the cost of testing and packaging.
 
@@ -28,6 +31,7 @@ See:
 
 * [[shakti/m_class/libre_3d_gpu]]
 * [[discussion]]
+* [[resources]]
 * Founding [[charter]]
 * Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
 * Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
@@ -37,6 +41,7 @@ See:
 * Kazan Vulkan Driver (including 3D engine) <https://salsa.debian.org/Kazan-team/kazan>
 * [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
 * NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
+* [[nlnet_proposals]]
 
 Progress:
 
@@ -76,7 +81,9 @@ Progress:
 * <https://slashdot.org/submission/9750302/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
 * <https://hardware.slashdot.org/story/19/06/02/0153243/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
 * <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1104124-libre-risc-v-snags-50k-eur-grant-to-work-on-its-risc-v-3d-gpu-chip/page6>
-* <https://heise.de/-4242802>
+* <https://news.ycombinator.com/item?id=21112341>
+* <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
+* <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
 
 # Information Resources and Tutorials