debug: Add fence and fence.i to ensure Debug RAM is ready.

[riscv-isa-sim.git] / Makefile.in

diff --git a/Makefile.in b/Makefile.in
index e8c80dd4b331b785fee805d6157fcd7aef39f58e..01af91bf6f17c74d07fe5a371dd1cfdfcea16f66 100644 (file)
--- a/Makefile.in
+++ b/Makefile.in
@@ -55,9 +55,9 @@ enable_stow  := @enable_stow@
 
 ifeq ($(enable_stow),yes)
   stow_pkg_dir := $(prefix)/pkgs
-  INSTALLDIR ?= $(DESTDIR)/$(stow_pkg_dir)/$(project_name)-$(project_ver)
+  INSTALLDIR ?= $(DESTDIR)$(stow_pkg_dir)/$(project_name)-$(project_ver)
 else
-  INSTALLDIR ?= $(DESTDIR)/$(prefix)
+  INSTALLDIR ?= $(DESTDIR)$(prefix)
 endif
 
 install_hdrs_dir := $(INSTALLDIR)/include/$(project_name)