Set tval to 0 on traps with no specified tval

[riscv-isa-sim.git] / debug_rom / debug_rom_defines.h

diff --git a/debug_rom/debug_rom_defines.h b/debug_rom/debug_rom_defines.h
index 074107ceb8ce203c4da8b96a51616072f68e8647..616cf59045fc066e4bfb683050ca1ccfd32ada98 100644 (file)
--- a/debug_rom/debug_rom_defines.h
+++ b/debug_rom/debug_rom_defines.h
@@ -18,5 +18,6 @@
 // These needs to match the link.ld         
 #define DEBUG_ROM_WHERETO 0x300
 #define DEBUG_ROM_ENTRY   0x800
+#define DEBUG_ROM_TVEC    0x808
 
 #endif