debug: Use a more practical debug ROM

[riscv-isa-sim.git] / debug_rom / link.ld

diff --git a/debug_rom/link.ld b/debug_rom/link.ld
index aba6ae802e13f23a2c8edaf656f8535255a0fd53..897c42da001d1009bceb3bee32a83b7693d019cd 100644 (file)
--- a/debug_rom/link.ld
+++ b/debug_rom/link.ld
@@ -2,6 +2,10 @@ OUTPUT_ARCH( "riscv" )
 ENTRY( entry )
 SECTIONS
 {
+    .whereto 0x300 :
+    {
+        *(.whereto)
+    }   
     . = 0x800;
     .text :
     {