add hwacha exception support

[riscv-isa-sim.git] / hwacha / insns / vxcptrestore.h

diff --git a/hwacha/insns/vxcptrestore.h b/hwacha/insns/vxcptrestore.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..cb3d8f0a8aad00ff4af976ff87a94125405dd343 100644 (file)
--- a/hwacha/insns/vxcptrestore.h
+++ b/hwacha/insns/vxcptrestore.h
@@ -0,0 +1 @@
+require_supervisor_hwacha;