[bug #1166](https://bugs.libre-soc.org/show_bug.cgi?id=1166),
[bug #1167](https://bugs.libre-soc.org/show_bug.cgi?id=1167)
+# Dmitry
+
+- [bug #980](https://bugs.libre-soc.org/show_bug.cgi?id=980)
+ - Still some work required. A few days until
+ - Two types of pseudocode: instructions, python functions
+ - For now provides prototypes for many features
+
+# Sadoon
+
+- [bug #1157](https://bugs.libre-soc.org/show_bug.cgi?id=1157)
+ - walkthrough code during meeting.
+
+Jacob provided great help:
+
+```
+maddedu would be useful if you have a packed 130 bit number in words where the non-msb words have 64-bits per word, the code you had last i checked instead has 44-bits per register used
+this is the pattern used by the x + y remap mode...which isn't working yet, so svindex is suitable for now
+maddedu also has carry-out, which you don't have here
+so maddld is sufficient
+yes
+or the x + y remap once that's implemented
+setup shapes with svindex insn
+no, those are offset by the register specified in the sv. insn that remap is applied to
+svindex has element numbers, not x,y,z
+x,y,z are used for other remap modes
+yes, use the svindex insn
+you specify the vector to load element numbers from in the svindex insn
+but they're accessed with element-sized chunks with element size determined by svindex
+svindex is if you want only one sv.maddld insn that loops 9 times
+lemme move to my desktop so i can type easier...
+ok, so you'll want a mod-3 matrix remap in one SVSHAPE register, and svindex remap in another SVSHAPE register
+so run svshape to set the matrix remap, then run svindex to overwrite one remap...
+svshape writes all 4 SVSHAPE registers, svindex can set the SVSHAPE register you specify
+(or all 4, but you don't want that mode)
+so test_1_sv_index is an example of what you want...
+it sets SVSHAPE2
+encoded in the LSB 2 bits of the operand that's 14
+the rmm operand
+see comments immediately above
+see line 396 of simplev.mdwn for how rmm is used
+in openpower-isa.git
+* **SVG** - GPR SVG<<2 to be used for Indexing
+so if you want the indexes to be in r4,r5,r6... set SVG to 1 which comes out to r4 (1 << 2)
+yes, a value of zero means use element 0
+so, if you want remap to use elements 1,2,3,4,5,6,7,8 set the first register to 0x0807060504030201 and use byte elwid
+the svindex elwid, not the sv.insn elwid, they're independent
+svremap tells the following sv.insn which SVSHAPE[0-3] register to use for each operand
+you don't want to set the SVSHAPE register directly, instead put the indexes in GPRs and svindex insn sets SVSHAPE to point to those GPRs
+ok, so if your indexes are in r4,r5 with byte elements, afaict you want svindex 1, 1, 9, 3, 0, 1, 0 which sets byte mode, sets SVSHAPE1
+```
+
+
# Andrey
-- Came back from holiday yesterday.
+- Recovering from a cold (worst of it already happened on the weekend,
+now mostly blocked nose).
- [Bug #1048](https://bugs.libre-soc.org/show_bug.cgi?id=1048),
- Cleaning up ls011 by using inline ld/st imports.
+ Luke and Jacob made comments regarding the summary, I'll work on it
+ when available.
+- Checked that RfP for Red was paid, so added extra commentary on IRC
+(continued from walkthrough Luke and I did last month).
+ - [[HDL_workflow/rfp_submission_guide]]
+ - Additional
+[IRC messages](https://libre-soc.org/irclog/latest.log.html#t2024-01-15T17:58:17)
+- Created a discussion page for the "git commit frequency" topic that
+came up last week: [[discussion/sync_up_2024-01-16_discussion]].
+Announcement on
+[IRC](https://libre-soc.org/irclog/latest.log.html#t2024-01-15T19:05:24)
+- TODO:
+ - Change my main email from technepisteme.xyz to the gmail one.
+ - Redo the calendar invites for the sync-up meetings.
# Jacob
projects / libreriscv.git / blobdiff