Examples:
-* `sv.fmvtg/sw=32 RT.v, FRA.v` is defined as treating FRA
+* `sv.mffpr/sw=32 RT.v, FRA.v` is defined as treating FRA
as a vector of *FP32* source operands each *32* bits wide
which are to be placed into *64* bit integer destination elements.
-* `sv.fmvfgs/dw=32 FRT.v, RA.v` is defined as taking the bottom
+* `sv.mtfprs/dw=32 FRT.v, RA.v` is defined as taking the bottom
32 bits of each RA integer source, then performing a **32 bit**
FP32 to **FP16** conversion and storing the result in the
**32 bits** of an FRT destination element.
## Rust
```
-pub fn fcvttgd_rust(v: f64) -> i64 {
+pub fn cffprd_rust(v: f64) -> i64 {
v as i64
}
-pub fn fcvttgud_rust(v: f64) -> u64 {
+pub fn cffprud_rust(v: f64) -> u64 {
v as u64
}
-pub fn fcvttgw_rust(v: f64) -> i32 {
+pub fn cffprw_rust(v: f64) -> i32 {
v as i32
}
-pub fn fcvttguw_rust(v: f64) -> u32 {
+pub fn cffpruw_rust(v: f64) -> u32 {
v as u32
}
```
.long 0xdf000000
.LCPI0_1:
.quad 0x43dfffffffffffff
-example::fcvttgd_rust:
+example::cffprd_rust:
.Lfunc_gep0:
addis 2, 12, .TOC.-.Lfunc_gep0@ha
addi 2, 2, .TOC.-.Lfunc_gep0@l
.long 0x00000000
.LCPI1_1:
.quad 0x43efffffffffffff
-example::fcvttgud_rust:
+example::cffprud_rust:
.Lfunc_gep1:
addis 2, 12, .TOC.-.Lfunc_gep1@ha
addi 2, 2, .TOC.-.Lfunc_gep1@l
.long 0xcf000000
.LCPI2_1:
.quad 0x41dfffffffc00000
-example::fcvttgw_rust:
+example::cffprw_rust:
.Lfunc_gep2:
addis 2, 12, .TOC.-.Lfunc_gep2@ha
addi 2, 2, .TOC.-.Lfunc_gep2@l
.long 0x00000000
.LCPI3_1:
.quad 0x41efffffffe00000
-example::fcvttguw_rust:
+example::cffpruw_rust:
.Lfunc_gep3:
addis 2, 12, .TOC.-.Lfunc_gep3@ha
addi 2, 2, .TOC.-.Lfunc_gep3@l