[sim,opcodes] improved sim build and run performance

[riscv-isa-sim.git] / riscv / common.h

diff --git a/riscv/common.h b/riscv/common.h
index cbb8e958cabae496b61ac916f1ec2d124cd796ae..7dd657048e45f7c89d62172c8fde346af7bd39f7 100644 (file)
--- a/riscv/common.h
+++ b/riscv/common.h
@@ -22,4 +22,7 @@
 
 #define static_assert(x)       switch (x) case 0: case (x):
 
+#define   likely(x) __builtin_expect(x, 1)
+#define unlikely(x) __builtin_expect(x, 0)
+
 #endif