OpenOCD does a dmi read and gets dummy value back.

[riscv-isa-sim.git] / riscv / debug_module.h

diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index d7c1a87baa797e710f13072b27b033fe74665d4a..0f9fff47e100e8bd4ec9f040e46432b67035c0ff 100644 (file)
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -16,20 +16,35 @@ class debug_module_t : public abstract_device_t
     uint32_t ram_read32(unsigned int index);
 
     void set_interrupt(uint32_t hartid) {
-      fprintf(stderr, "set debug interrupt 0x%x\n", hartid);
       interrupt.insert(hartid);
     }
     void clear_interrupt(uint32_t hartid) {
-      fprintf(stderr, "clear debug interrupt 0x%x\n", hartid);
       interrupt.erase(hartid);
     }
     bool get_interrupt(uint32_t hartid) const {
       return interrupt.find(hartid) != interrupt.end();
     }
 
+    void set_halt_notification(uint32_t hartid) {
+      halt_notification.insert(hartid);
+    }
+    void clear_halt_notification(uint32_t hartid) {
+      halt_notification.erase(hartid);
+    }
+    bool get_halt_notification(uint32_t hartid) const {
+      return halt_notification.find(hartid) != halt_notification.end();
+    }
+
+    // Debug Module Interface that the debugger (in our case through JTAG DTM)
+    // uses to access the DM.
+    uint32_t dmi_read(unsigned address);
+    void dmi_write(unsigned address, uint32_t value);
+
   private:
     // Track which interrupts from module to debugger are set.
     std::set<uint32_t> interrupt;
+    // Track which halt notifications from debugger to module are set.
+    std::set<uint32_t> halt_notification;
     char debug_ram[DEBUG_RAM_SIZE];
 };