Merge pull request #117 from riscv/multicore_debug

[riscv-isa-sim.git] / riscv / debug_module.h

diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index ca3ff312600ce00b434f776dba420562bea0b3b3..f0d2a475ad976afea9e321cfdb8978a90b2d429c 100644 (file)
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -26,6 +26,8 @@ typedef struct {
   bool anyrunning;
   bool allhalted;
   bool anyhalted;
+  bool allresumeack;
+  bool anyresumeack;
   bool authenticated;
   bool authbusy;
   bool cfgstrvalid;
@@ -33,18 +35,20 @@ typedef struct {
   unsigned versionlo;
 } dmstatus_t;
 
-typedef struct {
-  bool busy;
-  unsigned datacount;
-  unsigned progsize;
-  enum {
+typedef enum cmderr {
     CMDERR_NONE = 0,
     CMDERR_BUSY = 1,
     CMDERR_NOTSUP = 2,
     CMDERR_EXCEPTION = 3,
     CMDERR_HALTRESUME = 4,
-    CMDERR_OTHER = 7
-  } cmderr;
+    CMDERR_OTHER = 7  
+} cmderr_t;
+
+typedef struct {
+  bool busy;
+  unsigned datacount;
+  unsigned progsize;
+  cmderr_t cmderr;
 } abstractcs_t;
 
 typedef struct {
@@ -52,20 +56,6 @@ typedef struct {
   unsigned autoexecdata;
 } abstractauto_t;
 
-class debug_module_data_t : public abstract_device_t
-{
-  public:
-    debug_module_data_t();
-
-    bool load(reg_t addr, size_t len, uint8_t* bytes);
-    bool store(reg_t addr, size_t len, const uint8_t* bytes);
-
-    uint32_t read32(reg_t addr) const;
-    void write32(reg_t addr, uint32_t value);
-
-    uint8_t data[DEBUG_EXCHANGE_SIZE];
-};
-
 class debug_module_t : public abstract_device_t
 {
   public:
@@ -83,20 +73,24 @@ class debug_module_t : public abstract_device_t
     bool dmi_write(unsigned address, uint32_t value);
 
   private:
-    static const unsigned progsize = 8;
-
+    static const unsigned datasize = 2;
+    static const unsigned progsize = 16;
+    static const unsigned debug_data_start = 0x380;
+    static const unsigned debug_progbuf_start = debug_data_start - progsize*4;
+
+    static const unsigned debug_abstract_size = 2;
+    static const unsigned debug_abstract_start = debug_progbuf_start - debug_abstract_size*4;
+        
     sim_t *sim;
 
-    uint8_t debug_rom_entry[DEBUG_ROM_ENTRY_SIZE];
-    uint8_t debug_rom_code[DEBUG_ROM_CODE_SIZE];
-    uint8_t debug_rom_exception[DEBUG_ROM_EXCEPTION_SIZE];
+    uint8_t debug_rom_whereto[4];
+    uint8_t debug_abstract[debug_abstract_size * 4];
     uint8_t program_buffer[progsize * 4];
+    uint8_t dmdata[datasize * 4];
+    
     bool halted[1024];
-    debug_module_data_t dmdata;
-    // Instruction that will be placed at the current hart's ROM entry address
-    // after the current action has completed.
-    uint32_t next_action;
-    bool action_executed;
+    bool resumeack[1024];
+    uint8_t debug_rom_flags[1024];
 
     void write32(uint8_t *rom, unsigned int index, uint32_t value);
     uint32_t read32(uint8_t *rom, unsigned int index);