Exceptions in Debug Mode, stay in Debug Mode.

[riscv-isa-sim.git] / riscv / decode.h

diff --git a/riscv/decode.h b/riscv/decode.h
index 3a8b3a490dc836d50d9e91418d853c886664ff6f..067d426da8c91cbe573b4d679049948d386e1cfc 100644 (file)
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -239,6 +239,7 @@ private:
 #define DEBUG_START             0x100
 #define DEBUG_ROM_START         0x800
 #define DEBUG_ROM_RESUME        (DEBUG_ROM_START + 4)
+#define DEBUG_ROM_EXCEPTION     (DEBUG_ROM_START + 8)
 #define DEBUG_ROM_END           (DEBUG_ROM_START + debug_rom_raw_len)
 #define DEBUG_RAM_START         0x400
 #define DEBUG_RAM_SIZE          64