Software breakpoints sort of work.
[riscv-isa-sim.git] / riscv / decode.h
index 067d426da8c91cbe573b4d679049948d386e1cfc..1625398c8443d8d6ae8b86b4bcf60b2b423b79d8 100644 (file)
@@ -229,12 +229,6 @@ private:
  * automatically generated. */
 /* TODO */
 #include "/media/sf_tnewsome/Synced/SiFive/debug-spec/core_registers.tex.h"
-#define DCSR_CAUSE_NONE         0
-#define DCSR_CAUSE_SWBP         1
-#define DCSR_CAUSE_HWBP         2
-#define DCSR_CAUSE_DEBUGINT     3
-#define DCSR_CAUSE_STEPPED      4
-#define DCSR_CAUSE_HALT         5
 
 #define DEBUG_START             0x100
 #define DEBUG_ROM_START         0x800