Require little-endian host

[riscv-isa-sim.git] / riscv / encoding.h

diff --git a/riscv/encoding.h b/riscv/encoding.h
index 1b9883ee29fdc31b33b08a24d077c5452a5f329b..a7066b7bf7e723123663541cd39ecb483c13ccff 100644 (file)
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -17,7 +17,7 @@
 #define MSTATUS_FS          0x00006000
 #define MSTATUS_XS          0x00018000
 #define MSTATUS_MPRV        0x00020000
-#define MSTATUS_PUM         0x00040000
+#define MSTATUS_SUM         0x00040000
 #define MSTATUS_MXR         0x00080000
 #define MSTATUS_TVM         0x00100000
 #define MSTATUS_TW          0x00200000
@@ -32,7 +32,8 @@
 #define SSTATUS_SPP         0x00000100
 #define SSTATUS_FS          0x00006000
 #define SSTATUS_XS          0x00018000
-#define SSTATUS_PUM         0x00040000
+#define SSTATUS_SUM         0x00040000
+#define SSTATUS_MXR         0x00080000
 #define SSTATUS32_SD        0x80000000
 #define SSTATUS64_SD        0x8000000000000000
 
@@ -123,6 +124,16 @@
 #define SPTBR_MODE_SV57 10
 #define SPTBR_MODE_SV64 11
 
+#define PMP_R     0x01
+#define PMP_W     0x02
+#define PMP_X     0x04
+#define PMP_M     0x08
+#define PMP_NAPOT 0x10
+#define PMP_TOR   0x20
+#define PMP_EN    0x40
+#define PMP_LOCK  0x80
+#define PMP_SHIFT 2
+
 #define IRQ_S_SOFT   1
 #define IRQ_H_SOFT   2
 #define IRQ_M_SOFT   3
@@ -136,9 +147,8 @@
 #define IRQ_HOST     13
 
 #define DEFAULT_RSTVEC     0x00001000
-#define DEFAULT_NMIVEC     0x00001004
-#define DEFAULT_MTVEC      0x00001010
-#define CONFIG_STRING_ADDR 0x0000100C
+#define CLINT_BASE         0x02000000
+#define CLINT_SIZE         0x000c0000
 #define EXT_IO_BASE        0x40000000
 #define DRAM_BASE          0x80000000