Software breakpoints sort of work.

[riscv-isa-sim.git] / riscv / encoding.h

diff --git a/riscv/encoding.h b/riscv/encoding.h
index 11aa5187a4dd4efd59bcd3738fabb88fab32d119..fcc0a8a75efcd6d08aaa4d480b89b902547d8706 100644 (file)
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -34,6 +34,14 @@
 #define SSTATUS64_SD        0x8000000000000000
 
 #define DCSR_PRV            (3<<14)
+#define DCSR_CAUSE          7
+
+#define DCSR_CAUSE_NONE     0
+#define DCSR_CAUSE_SWBP     1
+#define DCSR_CAUSE_HWBP     2
+#define DCSR_CAUSE_DEBUGINT 3
+#define DCSR_CAUSE_STEP     4
+#define DCSR_CAUSE_HALT     5
 
 #define MIP_SSIP            (1 << IRQ_S_SOFT)
 #define MIP_HSIP            (1 << IRQ_H_SOFT)