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Merge pull request #177 from riscv/debug_auth
[riscv-isa-sim.git]
/
riscv
/
execute.cc
diff --git
a/riscv/execute.cc
b/riscv/execute.cc
index e60ffd117ebeb58a0f8f16c46bb5161ce1d58053..f8f122ad2a33a758b60cbe0c69bf0a7504f9d3c6 100644
(file)
--- a/
riscv/execute.cc
+++ b/
riscv/execute.cc
@@
-2,7
+2,6
@@
#include "processor.h"
#include "mmu.h"
-#include "sim.h"
#include <cassert>
@@
-114,6
+113,7
@@
void processor_t::step(size_t n)
default: abort(); \
} \
pc = state.pc; \
+ check_pc_alignment(pc); \
break; \
} else { \
state.pc = pc; \