Support debug system bus access.

[riscv-isa-sim.git] / riscv / extension.h

diff --git a/riscv/extension.h b/riscv/extension.h
index cce8345121f61a9f2fe554d0f284b810977236f5..d1e847d9b8ebff01511fbed25aef21f910313ac2 100644 (file)
--- a/riscv/extension.h
+++ b/riscv/extension.h
@@ -1,10 +1,10 @@
+// See LICENSE for license details.
+
 #ifndef _RISCV_COPROCESSOR_H
 #define _RISCV_COPROCESSOR_H
 
 #include "processor.h"
 #include "disasm.h"
-#include <map>
-#include <string>
 #include <vector>
 #include <functional>
 
@@ -27,11 +27,12 @@ class extension_t
   void clear_interrupt();
 };
 
-std::map<std::string, std::function<extension_t*()>>& extensions();
+std::function<extension_t*()> find_extension(const char* name);
+void register_extension(const char* name, std::function<extension_t*()> f);
 
 #define REGISTER_EXTENSION(name, constructor) \
   class register_##name { \
-    public: register_##name() { extensions()[#name] = constructor; } \
+    public: register_##name() { register_extension(#name, constructor); } \
   }; static register_##name dummy_##name;
 
 #endif