Set impebreak.

[riscv-isa-sim.git] / riscv / insn_template.cc

diff --git a/riscv/insn_template.cc b/riscv/insn_template.cc
index d2c0fce4322a1f1dbd1ad7d4d3416c369da153bb..1e79326c462446a94f6a16aa2b0cf7384ef45d16 100644 (file)
--- a/riscv/insn_template.cc
+++ b/riscv/insn_template.cc
@@ -4,16 +4,18 @@
 
 reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc)
 {
-  int xprlen = 32;
-  reg_t npc = sext_xprlen(pc + insn_length(OPCODE));
+  int xlen = 32;
+  reg_t npc = sext_xlen(pc + insn_length(OPCODE));
   #include "insns/NAME.h"
+  trace_opcode(p, OPCODE, insn);
   return npc;
 }
 
 reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc)
 {
-  int xprlen = 64;
-  reg_t npc = sext_xprlen(pc + insn_length(OPCODE));
+  int xlen = 64;
+  reg_t npc = sext_xlen(pc + insn_length(OPCODE));
   #include "insns/NAME.h"
+  trace_opcode(p, OPCODE, insn);
   return npc;
 }