Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insn_template.cc

diff --git a/riscv/insn_template.cc b/riscv/insn_template.cc
index 5bd986e18be53d49e501b8d6d2275acc9aa51bd1..a901077fab798250a16285ad0ce2d49fecf7ad5d 100644 (file)
--- a/riscv/insn_template.cc
+++ b/riscv/insn_template.cc
@@ -8,7 +8,7 @@
 #include "internals.h" // ditto
 #include <assert.h>
 
-reg_t processor_t::rv32_NAME(insn_t insn, reg_t pc)
+reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc)
 {
   int xprlen = 32;
   reg_t npc = sext_xprlen(pc + insn_length(OPCODE));
@@ -16,7 +16,7 @@ reg_t processor_t::rv32_NAME(insn_t insn, reg_t pc)
   return npc;
 }
 
-reg_t processor_t::rv64_NAME(insn_t insn, reg_t pc)
+reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc)
 {
   int xprlen = 64;
   reg_t npc = sext_xprlen(pc + insn_length(OPCODE));