[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / add_d.h

diff --git a/riscv/insns/add_d.h b/riscv/insns/add_d.h
index bd0f55a9e12fedd05188bfa430a69b8e8a4304da..964aa20885310f341aaf228611a5cbfe68d6fe1f 100644 (file)
--- a/riscv/insns/add_d.h
+++ b/riscv/insns/add_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float64_add(FRA, FRB);
+FRC = f64_add(FRA, FRB);
 set_fp_exceptions;