[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / add_s.h

diff --git a/riscv/insns/add_s.h b/riscv/insns/add_s.h
index b4f98f63355a7ffbfeec85ff9403bd00799447de..d4d0cd6037f37e70ce910c7a584df1198a88b562 100644 (file)
--- a/riscv/insns/add_s.h
+++ b/riscv/insns/add_s.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float32_add(FRA, FRB);
+FRC = f32_add(FRA, FRB);
 set_fp_exceptions;