Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoadd_d.h

diff --git a/riscv/insns/amoadd_d.h b/riscv/insns/amoadd_d.h
index bba975ce1fbccaf7357f02b71244bc8512dcc91a..532902ea94a2a2121ffc85e1fc23854cb3f8722f 100644 (file)
--- a/riscv/insns/amoadd_d.h
+++ b/riscv/insns/amoadd_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 + v);
-RD = v;
+WRITE_RD(v);