Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / amoadd_w.h

diff --git a/riscv/insns/amoadd_w.h b/riscv/insns/amoadd_w.h
index 033b3c8007686667334ce7fde559c680667bf4fc..07c9c9a9e9591a7c0c0f6aacdade8b8beaefa358 100644 (file)
--- a/riscv/insns/amoadd_w.h
+++ b/riscv/insns/amoadd_w.h
@@ -1,3 +1,3 @@
-reg_t v = mmu.load_int32(RS1);
-mmu.store_uint32(RS1, RS2 + v);
+reg_t v = MMU.load_int32(RS1);
+MMU.store_uint32(RS1, RS2 + v);
 RD = v;