Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / amoand_d.h

diff --git a/riscv/insns/amoand_d.h b/riscv/insns/amoand_d.h
index 586eb7fb9683ebfa6b78874de10a923e5ec936bb..1bb34029d3258cc9539dcb724f0478944e5ffeca 100644 (file)
--- a/riscv/insns/amoand_d.h
+++ b/riscv/insns/amoand_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2 & v);
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2 & v);
 RD = v;