Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoand_d.h

diff --git a/riscv/insns/amoand_d.h b/riscv/insns/amoand_d.h
index 1bb34029d3258cc9539dcb724f0478944e5ffeca..8a672ba56f52cf1770a378f1415989cf4b872102 100644 (file)
--- a/riscv/insns/amoand_d.h
+++ b/riscv/insns/amoand_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 & v);
-RD = v;
+WRITE_RD(v);