Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoand_w.h

diff --git a/riscv/insns/amoand_w.h b/riscv/insns/amoand_w.h
index 91866dcfef7d3f46ba994c5265063c8bd279f369..32ea7f70fa9a643c598e663898b655c8269011cd 100644 (file)
--- a/riscv/insns/amoand_w.h
+++ b/riscv/insns/amoand_w.h
@@ -1,3 +1,3 @@
 reg_t v = MMU.load_int32(RS1);
 MMU.store_uint32(RS1, RS2 & v);
-RD = v;
+WRITE_RD(v);