Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amomin_d.h

diff --git a/riscv/insns/amomin_d.h b/riscv/insns/amomin_d.h
index a20ace885c34fbf87cb2b2ba80536f0b6017b6f5..62915bb0df945b7c9cd42a8ba144b348b319201f 100644 (file)
--- a/riscv/insns/amomin_d.h
+++ b/riscv/insns/amomin_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
 sreg_t v = MMU.load_int64(RS1);
 MMU.store_uint64(RS1, std::min(sreg_t(RS2),v));
-RD = v;
+WRITE_RD(v);