Instructions are no longer member functions
[riscv-isa-sim.git] / riscv / insns / amomin_w.h
index 529ad50c1d286d3738f6348b46b78be8b4ec8c83..d8f95af6627c4e83d316179bde716a76866e7b3c 100644 (file)
@@ -1,3 +1,3 @@
-int32_t v = mmu.load_int32(RS1);
-mmu.store_uint32(RS1, std::min(int32_t(RS2),v));
+int32_t v = MMU.load_int32(RS1);
+MMU.store_uint32(RS1, std::min(int32_t(RS2),v));
 RD = v;